Operating instructions

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The two unused, divide by two, stages of U606 are then used to convert the 400Hz
FoLD pulse trains into 200Hz square waves for the Timer inputs of the CPU.
5.6.4 The DAC
U601 is a quad DAC. It is programmed by the CPU via the serial bus (SCLK and
MOSI). It is selected by the low active signal SIGGEN_ADSEL.
Three of its outputs are used to adjust the reference oscillators.
In the presence of an external reference oscillator, the software will automatically track
the channel VCO to the external clock.
The modulation reference oscillator is always tracked as closely as possible to the
Channel reference oscillator. Because of this need for very close tracking, two DAC
outputs are summed. In this way, the CPU is given coarse, as well as fine control.
The CPU can sense a phase difference of 136ns in 4 seconds,
i.e. as little as 0.034ppm
between the two PLL reference oscillators. Each step of the MOD_ADJ_FINE DAC
output will move the frequency about 2% of this amount.
The other DAC output (BALANCE) is used to adjust the BALANCE VCA (see sheet
7).
The user programmable digital output of the DAC (MOD_VCO_EN) is used to enable
the modulation VCO (when High)
5.6.5 The VCOs and the RF Output
These are more closely described in 5.7, but it is worth noting that there are three
primary outputs of the VCOs. There is each VCO output itself, but also the signal
VCO_OUT. This is the difference frequency between them.
Generally the modulation VCO is set to oscillate at 320MHz. To get an output of
40MHz, the Channel VCO is set to 280MHz.
But if you wanted an output frequency of, for example, 40.00125MHz, then the
modulation VCO would change to 319.78125 MHz (i.e. it drops by 218.75kHz), and the
Channel VCO would become 279.78MHz (i.e. dropping by 220kHz).
By such small changes in the modulation VCO (maximum delta is +/- 240kHz), each
multiple of 1250Hz can be accommodated, without any need to ever change the two
phase detector frequencies.
5.7 Voltage Controlled Oscillators (Sheet 7)
JFETS Q704, and Q705 are the heart of two
Colpitts oscillators.
The capacitor feedback divider for Q704 (modulation VCO) is defined by C732 and
C733, and this shapes the negative impedance looking into the drain of Q704.
In the Channel VCO, C740 is effectively in series with Cgs of Q705. These, then define
the negative impedance looking into the drain of Q705.
L716, in parallel with L726 forms the tank coil for the modulation oscillator, and the
resonant capacitance is defined by the series combination of C750 and the capacitance
across D701. L712 has +
ve reactance and it acts to reduce the minimum effective
capacitance seen back through C750, thereby increasing the tuning range slightly.
Similarly, L719 is the tank coil for the channel oscillator, and the resonant capacitance
is defined by the series combination of C751 and the capacitance across D704. L717
has +ve reactance and it acts to reduce the minimum effective capacitance seen back
through C751, thereby increasing the tuning range slightly.