Operating instructions

RF Technology R350/R500 Page 11
5.3 VCO Section 5 CIRCUIT DESCRIPTION
CF1 and its termination resistors R15 and R24 are the only component differences in
the two versions.
The limiter/discriminator IC U3 further amplifies the signal and passes it through CF2.
CF2 does not contribute to the adjacent channel rejection but is used to reduce the
wide band noise input to the limiter section of U3.
The limiter section of U3 drives the quadrature detector discriminator. C31 and IF
tuned circuit L10 comprise the discriminator phase shift network.
U3 also has a received signal strength indicator output (RSSI). The RSSI voltage
connects to the test socket for alignment use. The RSSI voltage is also used by the
microprocessor for the adaptive noise squelch, carrier squelch and low signal alarm
functions.
Dual op-amp U2 is used to amplify and buffer the discriminator audio and RSSI
outputs.
5.3 VCO Section
The Voltage Controlled Oscillator uses a junction FET Q6 which oscillates at the
required mixer injection frequency. Varactor diode D4 is used by the PLL circuit to
keep the oscillator on the desired frequency. Transistor Q7 is used as a filter to reduce
the noise on the oscillator supply voltage.
5.4 PLL Section
Temperature compensated crystal oscillator XO1 is the frequency reference source for
the PLL Synthesizer. The frequency stability of XO1 is better than 1 ppm.
The 12.8 MHz output of XO1 is amplified by Q8 to drive the reference input of the
PLL synthesizer IC U4. This IC is a single chip synthesizer which includes a 1.1 GHz
pre-scaler, programmable divider, reference divider and phase/frequency detector. The
frequency data is entered a serial data link from the microprocessor.
The phase detector output signals of U4 are used to control two switched current
sources. The output of the positive and negative sources' Q10 and Q16, produce the
tuning voltage which is smoothed by the loop filter components to bias the VCO
varactor diode D4.