Operating instructions

RF Technology T350/T500 Page 16
5.12 Voltage Regulator 5 CIRCUIT DESCRIPTION
The analogue to digital converter is used to measure the forward and reverse power,
tuning voltage and dc supply voltage.
If the processor detects that the PTT_WIRE_OR signal is asserted low, it will attempt to
key the exciter up. It will first attempt to key the VCO through Q10, and if the LD pin
goes high, it will switch the 9.2 Volt transmit line through Q14 and Q16. Asserting
Q16 has the effect of also asserting the yellow Tx LED (D12) on the front panel,
enabling the local 25W power amplifier, and causing the T/R Relay output to be pulled
low. D24 is 30 volt zener which protects Q25 from both excessive voltages or reverse
voltages.
Should there be a problem with either the tuning volts, or the battery voltage, the VCO
locking, the forward power, or the reverse power, the microprocessor will assert the
ALARM LED through Q1. Depending on the setting of Jumper JP19, the ALARM
signal can be brought out on pin 7 of P3.
5.12 Voltage Regulator
The dc input voltage is regulated down to 9.4 Vdc by a discrete regulator circuit. The
series pass transistor Q23 is driven by error amplifiers Q8 and Q18. Q9 is used to start
up the regulator and once the circuit turns on, it plays no further part in the operation.
The +5 Volt supply for the logic circuits is provided by an integrated circuit regulator
U14 which is run from the regulated 9.4 Volt supply.
Jumper JP18 is not normally fitted to the board, and is bridged with a 12mil track on the
component side of the board. It is provided so that the 9.4V load can be isolated from
the supply by the service department to aid in fault finding.
Jumper JP20 and JP21 are also not normally fitted on the board, and are usually bridged
with a 12mil track on the component side. they allow U14 to be isolated from its input,
or its output, or both.
6 Field Alignment Procedure
The procedures given below may be used to align the transmitter in the field. Normally,
alignment is only required when changing operating frequencies, or after component
replacement.
The procedures below do not constitute an exhaustive test or a complete alignment of
the module, but if successfully carried out are adequate in most circumstances.
TCXO calibration may be periodically required owing to normal quartz crystal aging. A
drift of 1ppm/year is to be expected.
Each alignment phase assumes that the preceding phase has been successfully carried
out, or at least that the module is already in properly aligned state with respect to
preceding conditions.