User's Manual

A two-pole voltage tuned filter (D6, D7, L18-20, L23 and L24) is used to limit the RF

bandwidth prior to the RF amplifier transistor Q1. The tuning voltage is supplied by the

RISC processor through the bias control. The circuit values are chosen so that the

centre frequency tracks the VCO bias voltage. RF amplifier transistor Q5 is followed by

a second two-pole voltage tuned filter (D4, D5, L7, L11, L14, L21 and L22) which

provides additional image and spurious frequency rejection. The filter output is

connected to the RF input port of the mixer MX1 via a 1.8dB pad.

The Mixer

MX1 is a level 13 double balanced diode ring mixer with excellent Intermodulation

performance. It has a conversion loss of approximately 6 dB. The gain between the

receiver input and the mixer input is approximately 10 dB so that the total gain between

the antenna input and the IF input 3-4dB. The network (C28, C74, L29, L15, L16 and

R20) passes the IF frequency of 45 MHz and terminates the RF and LO components.

The Local Oscillator (LO)

The LO is a Voltage Controlled Oscillator (Q2) which oscillates at the required

transmitter output frequency. Varactor diodes (D2, D9 - D11) are used by the PLL and

bias control circuits to keep the oscillator on the desired frequency. Transistor Q1 is

used as an active filter to reduce the noise on the oscillator supply voltage. Monolithic

amplifiers U1, U2 and transistor Q6 amplify the VCO output to approximately +16dBm

then feed to the mixer via a 3dB pad.

The Phase Locked Loop (PLL)

The frequency reference for the PLL is from the Interface board via a 20pin connector.

A fractional-N PLL synthesiser (U10) is used in the RX module, PLL frequency PLL is

set by DSP via the serial bus. The phase detector output (charge pump) signal of U10 is

smoothed and filtered by the loop filter to form the tuning voltage for the VCO circuit.

The IF Amplifier

The first IF amplifier uses two parallel connected JFET transistors Q3 and Q4 to obtain

8-10 dB gain. The two transistors provide improved dynamic range and input matching

over a single transistor. A 4-pole 45 MHz crystal filter (FIL1, FIL2) is used between the

first and second IF amplifiers. The second IF amplifier (U3, U5) provides additional

35dB gain to drive the digital IF. A two pole crystal filter (FIL3) is used as an anti-alias

filter of the digital IF.

The Data Storage

Each RX module has an EEPROM for storing the individual module information such

as, TX module serial number, model name, frequency range, calibration data etc. This

is allows user to simply replace the RX module in the transceiver without redo the

alignment and calibration. The data is transferred between EEPROM and RISC

processor via the serial bus.