User manual

DRAM Timing Control

DRAM Slot

Use this to select DRAM slot to view SPD data. The default value is

  

DRAM Timing Control

  

Power Down Enable

Use this item to enable or disable DDR power down mode.

Bank Interleaving

Interleaving allows memory accesses to be spread out over banks on the

same node, or accross nodes, decreasing access contention.

Channel Interleaving

         -



Memory Controller Mode



