Datasheet

R01DS0041EJ0150 Rev.1.50 Page 80 of 221
Oct 18, 2013
RX210 Group 4. I/O Registers
0008 C042h PORT2 Port input data register PIDR 8 8 3 or 4
PCLKB
cycles when
reading,
2 or 3
PCLKB
cycles when
writing
3 ICLK
cycles when
reading,
2 ICLK
cycles when
writing
0008 C043h PORT3 Port input data register PIDR 8 8 3 or 4
PCLKB
cycles when
reading,
2 or 3
PCLKB
cycles when
writing
3 ICLK
cycles when
reading,
2 ICLK
cycles when
writing
0008 C044h PORT4 Port input data register PIDR 8 8 3 or 4
PCLKB
cycles when
reading,
2 or 3
PCLKB
cycles when
writing
3 ICLK
cycles when
reading,
2 ICLK
cycles when
writing
0008 C045h PORT5 Port input data register PIDR 8 8 3 or 4
PCLKB
cycles when
reading,
2 or 3
PCLKB
cycles when
writing
3 ICLK
cycles when
reading,
2 ICLK
cycles when
writing
0008 C046h PORT6 Port input data register PIDR 8 8 3 or 4
PCLKB
cycles when
reading,
2 or 3
PCLKB
cycles when
writing
3 ICLK
cycles when
reading,
2 ICLK
cycles when
writing
0008 C047h PORT7 Port input data register PIDR 8 8 3 or 4
PCLKB
cycles when
reading,
2 or 3
PCLKB
cycles when
writing
3 ICLK
cycles when
reading,
2 ICLK
cycles when
writing
0008 C048h PORT8 Port input data register PIDR 8 8 3 or 4
PCLKB
cycles when
reading,
2 or 3
PCLKB
cycles when
writing
3 ICLK
cycles when
reading,
2 ICLK
cycles when
writing
0008 C049h PORT9 Port input data register PIDR 8 8 3 or 4
PCLKB
cycles when
reading,
2 or
3
PCL
KB
cycles when
writing
3 ICLK
cycles when
reading,
2 ICLK
cycles when
writing
0008 C04Ah PORTA Port input data register PIDR 8 8 3 or 4
PCLKB
cycles when
reading,
2 or 3
PCLKB
cycles when
writing
3 ICLK
cycles when
reading,
2 ICLK
cycles when
writing
0008 C04Bh PORTB Port input data register PIDR 8 8 3 or 4
PCLKB
cycles when
reading,
2 or 3
PCLKB
cycles when
writing
3 ICLK
cycles when
reading,
2 ICLK
cycles when
writing
Table 4.1 List of I/O Registers (Address Order) (23 / 29)
Address
Module
Symbol Register Name
Register
Symbol
Number
of Bits
Access
Size
Number of Access Cycles
ICLK 
PCLK
ICLK <
PCLK