Datasheet

R01DS0041EJ0150 Rev.1.50 Page 55 of 221
Oct 18, 2013
RX210 Group 3. Address Space
3.2 External Address Space
The external address space is divided into up to four CS areas (CS0 to CS3), each corresponding to the CSn# signal
output from a CSn# (n = 0 to 3) pin.
Figure 3.2 shows the address ranges corresponding to the individual CS areas (CS0 to CS3) in on-chip ROM disabled
extended mode.
Figure 3.2 Correspondence between External Address Spaces and CS Areas
(In On-Chip ROM Disabled Extended Mode)
0500 0000h
0600 0000h
0700 0000h
CS3 (16 MB)
05FF FFFFh
06FF FFFFh
07FF FFFFh
CS2 (16 MB)
CS1 (16 MB)
FFFF FFFFh
FF00 0000h
CS0 (16 MB)
Note 1. Reserved areas should not be accessed.
Note 2. The CS0 area is disabled in on-chip ROM enabled extended mode. In this mode, the address space for
addresses above 0800 0000h is as shown in figure on this section “Memory Map in Each Operating Mode”.
Reserved area*
1
Reserved area*
1
Reserved area*
1
Reserved area*
1
0000 0000h
0008 0000h
FFFF FFFFh
On-chip ROM disabled
extended mode
On-chip RAM
0010 0000h
Peripheral I/O registers
0100 0000h
0800 0000h
FF00 0000h
0001 0000h
External address space*
2
External address space
0500 0000h