Datasheet

R01DS0041EJ0150 Rev.1.50 Page 51 of 221
Oct 18, 2013
RX210 Group 2. CPU
2. CPU
Figure 2.1 shows the register set of the CPU.
Figure 2.1 Register Set of the CPU
Note 1. The stack pointer (SP) can be the interrupt stack pointer (ISP) or user stack pointer (USP), according to
the value of the U bit in the PSW register.
USP (User stack pointer)
ISP (Interrupt stack pointer)
INTB (Interrupt table register)
PC (Program counter)
PSW (Processor status word)
BPC (Backup PC)
BPSW (Backup PSW)
FINTV (Fast interrupt vector register)
R15
R14
R13
R12
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0 (SP)
*1
General-purpose register
Control register
b31 b0
b31
b0
DSP instruction register
b63 b0
ACC (Accumulator)