Datasheet

R01DS0041EJ0150 Rev.1.50 Page 220 of 221
Oct 18, 2013
RX210 Group REVISION HISTORY
1.30 Jan 22, 2013 11 Table 1.6 List of Products Chip Version C: D Version (Ta = -40 to +85°C),
Table 1.7 List of Products Chip Version C: G Version (Ta = -40 to +105°C), changed
12 Figure 1.1 How to Read the Product Part No., Memory Capacity, and Package Type, changed
13 Figure 1.2 Block Diagram, changed
14 to 17 Table 1.8 Pin Functions, changed
18 Figure 1.3 Pin Assignments of the 145-Pin TFLGA (Upper Perspective View), added
19 Figure 1.4 Pin Assignments of the 144-Pin LQFP, added
25 to 28 Table 1.9 List of Pins and Pin Functions (145-Pin TFLGA), changed
29 to 32 Table 1.10 List of Pins and Pin Functions (144-Pin LQFP), changed
3. Address Space
48 Figure 3.1 Memory Map in Each Operating Mode, changed
4. I/O Registers
52 to 81 Table 4.1 List of I/O Registers (Address Order, changed
5. Electrical Characteristics
83 Table 5.2 DC Characteristics (1),
Table 5.3 DC Characteristics (2), changed
84 to 122 Table 5.6 DC Characteristics (5) to Table 5.20 DC Characteristics (19), changed
Figure 5.1 Voltage Dependency in High-Speed .... for Chip Version A to
Figure 5.34 Temperature Dependency in .... and 100 to 145 pins, changed
158 Table 5.55 Timing of On-Chip Peripheral Modules (1), changed
159 [512 Kbytes or less of flash memory and 48 to 100 pins]
Table 5.56 Timing of On-Chip Peripheral Modules (2), added
160, 161 [768 Kbytes/1 Mbyte of flash memory or 145/145 pins]
Table 5.57 Timing of On-Chip Peripheral Modules (3), added
162 Table 5.58 Timing of On-Chip Peripheral Modules (4), changed
165 Figure 5.75 MTU/TPU Input/Output Timing,
Figure 5.76 MTU/TPU Clock Input Timing, changed
166 Figure 5.79 SCK Clock Input Timing,
Figure 5.80 SCI Input/Output Timing: Clock Synchronous Mode, changed
167 Figure 5.82 RSPI Clock Timing and Simple SPI Clock Timing, changed
168 Figure 5.83 RSPI Timing (Master, CPHA = 0) .... and Simple SPI Timing (Master, CKPH = 1),
Figure 5.84 RSPI Timing (Master, CPHA = 0) (Bit Rate: PCLKB Set to Divided by 2), changed
169 Figure 5.85 RSPI Timing (Master, CPHA = 1) .... and Simple SPI Timing (Master, CKPH = 0),
Figure 5.86 RSPI Timing (Master, CPHA = 1) (Bit Rate: PCLKB Set to Divided by 2), changed
170 Figure 5.87 RSPI Timing (Slave, CPHA = 0) and Simple SPI Timing (Slave, CKPH = 1),
Figure 5.88 RSPI Timing (Slave, CPHA = 1) and Simple SPI Timing (Slave, CKPH = 0), changed
173 Table 5.64 A/D Conversion Characteristics (2), changed
175 Figure 5.91 Illustration of A/D Converter Characteristic Terms,
Absolute accuracy, changed
184 Table 5.74 ROM (Flash Memory for Code Storage) Characteristics (1), changed
189 Table 5.80 E2 DataFlash Characteristics (1),
Table 5.81 E2 DataFlash Characteristics (2), changed
Appendix 1. Package Dimensions
195 Figure A 145-Pin TFLGA (PTLG0145KA-A), added
196 Figure B 144-Pin LQFP (PLQP0144KA-A), added
1.40 Feb 19, 2013 1. Overview
2 to 6 Table 1.1 Outline of Specifications, changed
Note 2, added
9 Table 1.4 List of Products Chip Version B: D Version (Ta = -40 to +85°C), changed
10 Table 1.5 List of Products Chip Version B: G Version (Ta = -40 to +105°C), changed
Note, added
11 Table 1.6 List of Products Chip Version C: D Version (Ta = -40 to +85°C): Note 1,
Table 1.7 List of Products Chip Version C: G Version (Ta = -40 to +105°C): Note 1 deleted,
Note added
12 Figure 1.1 How to Read the Product Part No., Memory Capacity, and Package Type, changed
4. I/O Registers
58 Table 5.1 List of I/O Registers (Address Order), changed
5. Electrical Characteristics
83 Table 5.4 DC Characteristics (3), changed
88 Table 5.8 DC Characteristics (7), changed
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