Datasheet

R01DS0041EJ0150 Rev.1.50 Page 193 of 221
Oct 18, 2013
RX210 Group 5. Electrical Characteristics
Figure 5.103 Voltage Detection Reset Timing
Figure 5.104 Power-on Reset Timing
Figure 5.105 Voltage Detection Circuit Timing (V
det0
)
t
VOFF
t
POR
t
det
t
det
V
POR
VCC
Internal reset signal
(active-low)
V
POR
0.9 V
t
w(por)
t
POR
t
det
VCC
*1
Internal reset signal
(active-low)
Note 1. t
w(por)
is the time required for a power-on reset to be enabled while the external power VCC is being held below the
valid voltage (0.9 V).
When VCC turns on, maintain t
w(por)
for 1 ms or more.
V
POR
t
VOFF
t
LVD0
t
det
V
det0
VCC
Internal reset signal
(active-low)
t
det