Datasheet

R01DS0041EJ0150 Rev.1.50 Page 185 of 221
Oct 18, 2013
RX210 Group 5. Electrical Characteristics
Note: The characteristics apply when no pin functions other than A/D converter input are used. Absolute accuracy includes
quantization errors. Offset error, full-scale error, DNL differential nonlinearity error, and INL integral nonlinearity error do not
include quantization errors.
Note: When using the channel-dedicated sample-and-hold circuit, use the AN000 to AN002 analog input voltage (V
AN
) that satisfies all
the following conditions: 0.25 V V
AN
AVCC0 - 0.25 V, V
AN
VREFH0, and AVCC0 2.7 V.
Note 1. The conversion time is the sum of the sampling time and the comparison time. As the test conditions, the number of sampling
states is indicated.
Note 2. The value in parentheses indicates the sampling time.
Note 3. When using the temperature sensor, use it when AVCC0 = VREFH0.
Note: The characteristics apply when no pin functions other than A/D converter input are used. Absolute accuracy includes
quantization errors. Offset error, full-scale error, DNL differential nonlinearity error, and INL integral nonlinearity error do not
include quantization errors.
Note 1. The conversion time is the sum of the sampling time and the comparison time. As the test conditions, the number of sampling
states is indicated.
Note 2. The value in parentheses indicates the sampling time.
Table 5.64 A/D Conversion Characteristics (2)
Conditions: VCC = AVCC0 = 1.8 to 3.6 V, 1.8 V VREFH0 2.7 V, AVCC0-0.9 V VREFH0 AVCC0*
3
,
VSS = AVSS0 = VREFL = VREFL0 = 0 V, T
a
= –40 to +105°C
Item Min. Typ. Max. Unit Test Conditions
A/D conversion clock frequency (fPCLKD) 1 25 MHz
Resolution 12 Bit
Conversion time*
1
(Operation at
fPCLKD = 25 MHz)
Permissible signal source
impedance (Max.) = 1 k
2.0
(0.8)*
2
µs Sampling in 20 states
Permissible signal source
impedance (Max.) = 5 k
2.2
(1.0)*
2
Sampling in 25 states
Analog input capacitance 30 pF
Offset error ±0.5 ±7.5 LSB
Full-scale error ±1.25 ±7.5 LSB
Quantization error ±0.5 LSB
Absolute accuracy ±3.0 ±8.0 LSB
DNL differential nonlinearity error ±1.25 LSB
INL integral nonlinearity error ±1.5 ±3.0 LSB
Table 5.65 A/D Conversion Characteristics (3)
Conditions: VCC = AVCC0 = 1.62 to 1.8 V, VREFH0 = AVCC0,
VSS = AVSS0 = VREFL = VREFL0 = 0 V, T
a
= –40 to +105°C
Item Min. Typ. Max. Unit Test Conditions
A/D conversion clock frequency (fPCLKD) 1 12.5 MHz
Resolution 12 Bit
Conversion time*
1
(Operation at
fPCLKD = 12.5
MHz)
Permissible signal source
impedance (Max.) = 1 k
3.36
(0.96)*
2
µs Sampling in 12 states
Permissible signal source
impedance (Max.) = 5 k
3.6
(1.2)*
2
Sampling in 15 states
Analog input capacitance 30 pF
Offset error ±0.5 ±7.5 LSB
Full-scale error ±1.25 ±7.5 LSB
Quantization error ±0.5 LSB
Absolute accuracy ±2.75 ±8.0 LSB
DNL differential nonlinearity error ±1.25 LSB
INL integral nonlinearity error ±1.25 ±3.0 LSB