Datasheet

R01DS0041EJ0150 Rev.1.50 Page 161 of 221
Oct 18, 2013
RX210 Group 5. Electrical Characteristics
Table 5.51 Bus Timing (3)
Conditions: VCC = AVCC0 = 1.62 to 1.8 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V,
fBCLK ≤ 12 MHz (BCLK pin output frequency ≤ 6 MHz), T
a
= –40 to +105°C, V
OH
= VCC × 0.5,
V
OL
= VCC × 0.5, I
OH
= –0.5 mA, I
OL
= 0.5 mA, C
L
= 30 pF
When normal output is selected by the drive capacity register
Item Symbol Min. Max. Unit Test Conditions
Address delay time t
AD
— 125 ns Figure 5.76 to
Figure 5.79
Byte control delay time t
BCD
— 125 ns
CS# delay time t
CSD
— 125 ns
RD# delay time t
RSD
— 125 ns
Read data setup time t
RDS
85 — ns
Read data hold time t
RDH
0—ns
WR# delay time t
WRD
— 125 ns
Write data delay time t
WDD
— 125 ns
Write data hold time t
WDH
0—ns
WAIT# setup time t
WTS
85 — ns Figure 5.80
WAIT# hold time t
WTH
0—ns