Datasheet
R01DS0041EJ0150 Rev.1.50 Page 15 of 221
Oct 18, 2013
RX210 Group 1. Overview
16-bit timer pulse
unit
TIOCA0, TIOCB0
TIOCC0, TIOCD0
I/O The TGRA0 to TGRD0 input capture input/output compare output/
PWM output pins.
TIOCA1, TIOCB1 I/O The TGRA1 and TGRB1 input capture input/output compare output/
PWM output pins.
TIOCA2, TIOCB2 I/O The TGRA2 and TGRB2 input capture input/output compare output/
PWM output pins.
TIOCA3, TIOCB3
TIOCC3, TIOCD3
I/O The TGRA3 to TGRD3 input capture input/output compare output/
PWM output pins.
TIOCA4, TIOCB4 I/O The TGRA4 and TGRB4 input capture input/output compare output/
PWM output pins.
TIOCA5, TIOCB5 I/O The TGRA5 and TGRB5 input capture input/output compare output/
PWM output pins.
TCLKA, TCLKB
TCLKC, TCLKD
Input Input pins for external clock signals.
Multi-function timer
pulse unit 2
MTIOC0A, MTIOC0B
MTIOC0C, MTIOC0D
I/O The TGRA0 to TGRD0 input capture input/output compare output/
PWM output pins.
MTIOC1A, MTIOC1B I/O The TGRA1 and TGRB1 input capture input/output compare output/
PWM output pins.
MTIOC2A, MTIOC2B I/O The TGRA2 and TGRB2 input capture input/output compare output/
PWM output pins.
MTIOC3A, MTIOC3B
MTIOC3C, MTIOC3D
I/O The TGRA3 to TGRD3 input capture input/output compare output/
PWM output pins.
MTIOC4A, MTIOC4B
MTIOC4C, MTIOC4D
I/O The TGRA4 to TGRD4 input capture input/output compare output/
PWM output pins.
MTIC5U, MTIC5V, MTIC5W Input The TGRU5, TGRV5, and TGRW5 input capture input/external
pulse input pins.
MTCLKA, MTCLKB,
MTCLKC, MTCLKD
Input Input pins for the external clock.
Port output enable 2 POE0# to POE3#, POE8# Input Input pins for request signals to place the MTU pins in the high
impedance state.
8-bit timer TMO0 to TMO3 Output Compare match output pins.
TMCI0 to TMCI3 Input Input pins for external clocks to be input to the counter.
TMRI0 to TMRI3 Input Input pins for the counter reset.
Realtime clock RTCOUT Output Output pin for 1-Hz clock.
RTCIC0 to RTCIC2 Input Time capture event input pins.
Serial
communications
interface (SCIc)
Asynchronous mode/clock synchronous mode
SCK0 to SCK11 I/O Input/output pins for the clock
RXD0 to RXD11 Input Input pins for received data
TXD0 to TXD11 Output Output pins for transmitted data
CTS0# to CTS11# Input Input pins for controlling the start of transmission and reception
RTS0# to RTS11# Output Output pins for controlling the start of transmission and reception
Simple I
2
C mode
SSCL0 to SSCL11 I/O Input/output pins for the I
2
C clock
SSDA0 to SSDA11 I/O Input/output pins for the I
2
C data
Simple SPI mode
SCK0 to SCK11 I/O Input/output pins for the clock
SMISO0 to SMISO11 I/O Input/output pins for slave transmission of data
SMOSI0 to SMOSI11 I/O Input/output pins for master transmission of data
SS0# to SS11# Input Chip-select input pins
Table 1.8 Pin Functions (2 / 4)
Classifications Pin Name I/O Description