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Datasheet

R01DS0041EJ0150 Rev.1.50 Page 1 of 221

Oct 18, 2013

RX210 Group

Renesas MCUs

Features

■ 32-bit RX CPU core

 Max. operating frequency: 50 MHz

Capable of 78 DMIPS in operation at 50 MHz

 Accumulator handles 64-bit results (for a single instruction)

from 32- × 32-bit operations

 Multiplication and division unit handles 32- × 32-bit

operations (multiplication instructions take one CPU clock

cycle)

 Fast interrupt

 CISC Harvard architecture with 5-stage pipeline

 Variable-length instructions, ultra-compact code

 On-chip debugging circuit

■ Low power design and architecture

 Operation from a single 1.62-V to 5.5-V supply

 1.62-V operation available (at up to 20 MHz)

 Deep software standby mode with RTC remaining usable

 Four low power consumption modes

■ On-chip flash memory for code, no wait states

 50-MHz operation, 20-ns read cycle

 No wait states for reading at full CPU speed

 64-K to 1-Mbyte capacities

 User code programmable via the SCI

 Programmable at 1.62 V

 For instructions and operands

■ On-chip data flash memory

 8 Kbytes

(Number of times of reprogramming: 100,000)

 Erasing and programming impose no load on the CPU.

■ On-chip SRAM, no wait states

 12-K to 96-Kbyte size capacities

■ DMA

 DMAC: Incorporates four channels

 DTC: Four transfer modes

■ ELC

 Module operation can be initiated by event signals without

going through interrupts.

 Modules can operate while the CPU is sleeping.

■ Reset and supply management

 Nine types of reset, including the power-on reset (POR)

 Low voltage detection (LVD) with voltage settings

■ Clock functions

 Frequency of external clock: Up to 20 MHz

 Frequency of the oscillator for sub-clock generation: 32.768

kHz

 PLL circuit input: 4 MHz to 12.5 MHz

 On-chip low- and high-speed oscillators, dedicated on-chip

low-speed oscillator for the IWDT

 Generation of a dedicated 32.768-kHz clock for the RTC

 Clock frequency accuracy measurement circuit (CAC)

■ Realtime clock

 Adjustment functions (30 seconds, leap year, and error)

 Year and month display or 32-bit second display (binary

counter) is selectable

 Time capture function

 Time capture on event-signal input through external pins

 RTC capable of initiating return from deep software standby

mode

■ Independent watchdog timer

 125-kHz on-chip oscillator produces a dedicated clock signal

to drive IWDT operation.

■ Useful functions for IEC60730 compliance

 Self-diagnostic and disconnection-detection assistance

functions for the A/D converter, clock frequency accuracy

measurement circuit, independent watchdog timer, functions

to assist in RAM testing, etc.

■ Up to 15 communications channels

 SCI with many useful functions (up to 13 channels)

Asynchronous mode, clock synchronous mode, smart card

interface

 I

C bus interface: Transfer at up to 400 kbps, capable of

SMBus operation (one channel)

 RSPI (one channel): Transfer at up to 16 Mbps (768-Kbyte/

1-Mbyte flash memory or 144/145-pin products)

■ External address space

 Four CS areas (4 × 16 Mbytes)

 8- or 16-bit bus space is selectable per area

■ Up to 20 extended-function timers

 16-bit MTU: input capture, output compare, complementary

PWM output, phase counting mode

(six channels)

 16-bit TPU: input capture, output capture, phase counting

mode (six channels)

 8-bit TMR (four channels)

 16-bit compare-match timers (four channels)

■ 12-bit A/D converter

 Capable of conversion within 1 μs

 Sample-and-hold circuits (for three channels)

 Three-channel synchronized sampling available

 Self-diagnostic function and analog input disconnection

detection assistance function

■ 10-bit D/A converter

■ Analog comparator

■ General I/O ports

 5-V tolerant, open drain, input pull-up, switching of driving

ability

■ MPC

 Multiple locations are selectable for I/O pins of peripheral

functions

■ Temperature sensor

■ Operating temp. range

40C to +85C

40C to +105C

■ Applications

 69WLBGA (SWBG0069LA-A): General consumer

equipment

 Other than above package: General industrial and consumer

equipment

PLQP0144KA-A 20 × 20 mm, 0.5-mm pitch

PLQP0100KB-A 14 × 14 mm, 0.5-mm pitch

PLQP0080KB-A 12 × 12 mm, 0.5-mm pitch

PLQP0064KB-A 10 × 10 mm, 0.5-mm pitch

PLQP0048KB-A 7 × 7 mm, 0.5-mm pitch

PLQP0080JA-A 14 × 14 mm, 0.65-mm pitch

PLQP0064GA-A 14 × 14 mm, 0.8-mm pitch

PTLG0145KA-A 7 × 7 mm, 0.5-mm pitch

PTLG0100JA-A 7 × 7 mm, 0.65-mm pitch

PTLG0100KA-A 5.5 × 5.5 mm, 0.5-mm pitch

PTLG0064JA-A 6 × 6 mm, 0.65-mm pitch

SWBG0069LA-A 3.91 × 4.26mm,

0.40-mm pitch

50-MHz 32-bit RX MCUs, 78 DMIPS, up to 1-MB flash memory,

12-bit A/D, 10-bit D/A, ELC, MPC, RTC, up to 15 comms channels;

incorporating functions for IEC60730 compliance

R01DS0041EJ0150

Rev.1.50

Oct 18, 2013

Summary of content (223 pages)

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Datasheet RX210 Group R01DS0041EJ0150 Rev.1.50 Oct 18, 2013 Renesas MCUs 50-MHz 32-bit RX MCUs, 78 DMIPS, up to 1-MB flash memory, 12-bit A/D, 10-bit D/A, ELC, MPC, RTC, up to 15 comms channels; incorporating functions for IEC60730 compliance Features PLQP0144KA-A 20 × 20 mm, 0.5-mm pitch PLQP0100KB-A 14 × 14 mm, 0.5-mm pitch PLQP0080KB-A 12 × 12 mm, 0.5-mm pitch PLQP0064KB-A 10 × 10 mm, 0.5-mm pitch PLQP0048KB-A 7 × 7 mm, 0.5-mm pitch PLQP0080JA-A 14 × 14 mm, 0.65-mm pitch PLQP0064GA-A 14 × 14 mm, 0.
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RX210 Group 1. Overview 1.Overview 1.1 Outline of Specifications Table 1.1 lists the specifications in outline, and Table 1.2 gives a comparison of the functions of products in different packages. Table 1.1 is for products with the greatest number of functions, so numbers of peripheral modules and channels will differ in accord with the package. For details, see Table 1.2, Comparison of Functions for Different Packages. This product includes chip version A (part no.
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RX210 Group Table 1.1 1.
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RX210 Group Table 1.1 1.
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RX210 Group Table 1.1 1.
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RX210 Group Table 1.1 1. Overview Outline of Specifications (5 / 5) Classification Module/Function Description Packages Chip version A 100-pin TFLGA (PTLG0100JA-A) 7 × 7 mm, 0.65-mm pitch 100-pin LQFP (PLQP0100KB-A) 14 × 14 mm, 0.5-mm pitch 80-pin LQFP (PLQP0080KB-A) 12 × 12 mm, 0.5-mm pitch 64-pin LQFP (PLQP0064KB-A) 10 × 10 mm, 0.5-mm pitch Chip version B 145-pin TFLGA (PTLG0145KA-A) 7 × 7 mm, 0.5-mm pitch 100-pin TFLGA (PTLG0100JA-A) 7 × 7 mm, 0.65-mm pitch 100-pin TFLGA (PTLG0100KA-A) 5.5 × 5.
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RX210 Group Table 1.2 1.
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RX210 Group 1.2 1. Overview List of Products Table 1.3 to Table 1.7 are a list of products, and Figure 1.1 shows how to read the product part no., memory capacity, and package type. Table 1.3 Group List of Products Chip Version A: D Version (Ta = 40 to +85°C) Part No. Orderable Part No.
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RX210 Group Table 1.4 Group 1. Overview List of Products Chip Version B: D Version (Ta = 40 to +85°C) Part No. Orderable Part No.
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RX210 Group Table 1.5 Group 1. Overview List of Products Chip Version B: G Version (Ta = 40 to +105°C) ROM Capacity Part No. Orderable Part No.
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RX210 Group Table 1.6 Group 1. Overview List of Products Chip Version C: D Version (Ta = 40 to +85°C) Part No. Orderable Part No.
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RX210 Group R 5 F 1. Overview 5 2 1 0 8 A D F P #V 0 Production identification code Packing, Terminal material (Pb-free) #3 : Tray/Sn (Tin) only #V : Tray/Sn (Tin) only #U : Tray/SnCu and others Package type, number of pins, and pin pitch FB : LQFP/144/0.50 FP : LQFP/100/0.50 FN: LQFP/80/0.50 FM: LQFP/64/0.50 FL : LQFP/48/0.50 FF : LQFP/80/0.65 FK : LQFP/64/0.80 LK : TFLGA/145/0.50 LA : TFLGA/100/0.50 LJ : TFLGA/100/0.65 LH : TFLGA/64/0.65 BM: WLBGA/69/0.
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RX210 Group 1.3 1. Overview Block Diagram Figure 1.2 shows a block diagram.
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RX210 Group 1.4 1. Overview Pin Functions Table 1.8 lists the pin functions. Table 1.8 Pin Functions (1 / 4) Classifications Pin Name I/O Description Power supply VCC Input Power supply pin. Connect it to the system power supply. VCL — Connect this pin to the VSS pin via the 0.1 μF smoothing capacitor used to stabilize the internal power supply. Place the capacitor close to the pin. VSS Input Ground pin. Connect it to the system power supply (0 V).
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RX210 Group Table 1.8 1. Overview Pin Functions (2 / 4) Classifications Pin Name I/O Description 16-bit timer pulse unit TIOCA0, TIOCB0 TIOCC0, TIOCD0 I/O The TGRA0 to TGRD0 input capture input/output compare output/ PWM output pins. TIOCA1, TIOCB1 I/O The TGRA1 and TGRB1 input capture input/output compare output/ PWM output pins. TIOCA2, TIOCB2 I/O The TGRA2 and TGRB2 input capture input/output compare output/ PWM output pins.
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RX210 Group Table 1.8 1.
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RX210 Group Table 1.8 1. Overview Pin Functions (4 / 4) Classifications Pin Name I/O Description Analog power supply AVCC0 Input Analog voltage supply pin for the 12-bit A/D converter. Connect this pin to VCC if the 12-bit A/D converter is not to be used. AVSS0 Input Analog ground pin for the 12-bit A/D converter. Connect this pin to VSS if the 12-bit A/D converter is not to be used. VREFH0 Input Analog reference voltage supply pin for the 12-bit A/D converter.
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RX210 Group 1.5 1. Overview Pin Assignments Figure 1.3 to Figure 1.11 show the pin assignments. Table 1.9 to Table 1.17 show the lists of pins and pin functions.
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PE3 PE4 PE5 PK4 P70 PK5 PE6 PE7 P65 P66 P67 PA0 PA1 PA2 PA3 VSS PA4 VCC PA5 PA6 PA7 PB0 P71 P72 PB1 PB2 PB3 PB4 PB5 PB6 PB7 P73 PL0 PC0 PL1 PC1 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 1.
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RX210 Group 1.
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1.
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PE3 PE4 PE5 PA0 PA1 PA2 PA3 PA4 PA5 PA6 VSS PB0 VCC PB1 PB2 PB3 PB4 PB5 PB6 PB7 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 1.
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RX210 Group 1.
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RX210 Group 1. Overview RX210 Group PTLG0064JA-A (64-pin TFLGA) (Upper perspective view) Note: Note: Figure 1.
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VSS PB0 VCC PB1 PB3 PB5 PB6 PB7 39 38 37 36 35 34 33 PA3 40 PA1 43 PA4 PA0 44 PA6 PE5 45 41 PE4 46 42 PE3 47 1.
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PA4 VSS PB0 VCC PB1 PB3 PB5 30 29 28 27 26 25 PA3 PA6 PA1 33 31 PE4 34 32 PE3 35 1.
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RX210 Group Table 1.9 1. Overview List of Pins and Pin Functions (145-Pin TFLGA) (1 / 4) Pin No.
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RX210 Group Table 1.9 Pin No. 1.
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RX210 Group Table 1.9 Pin No. 1.
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RX210 Group Table 1.9 Pin No. 1.
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RX210 Group Table 1.10 1. Overview List of Pins and Pin Functions (144-Pin LQFP) (1 / 4) Pin No.
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RX210 Group Table 1.10 Pin No. 1.
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RX210 Group Table 1.10 Pin No. 1.
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RX210 Group Table 1.10 Pin No. 1.
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RX210 Group Table 1.11 Pin No. 1.
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RX210 Group Table 1.11 Pin No. 1.
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RX210 Group Table 1.11 Pin No. 1.
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RX210 Group Table 1.12 1. Overview List of Pins and Pin Functions (100-Pin LQFP) (1 / 3) Pin No.
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RX210 Group Table 1.12 Pin No. 1.
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RX210 Group Table 1.12 Pin No. 1.
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RX210 Group Table 1.13 1. Overview List of Pins and Pin Functions (80-Pin LQFP) (1 / 2) Pin No.
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RX210 Group Table 1.13 Pin No. 1.
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RX210 Group Table 1.14 1. Overview List of Pins and Pin Functions (69-Pin WLBGA) (1 / 2) Pin No.
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RX210 Group Table 1.14 1. Overview List of Pins and Pin Functions (69-Pin WLBGA) (2 / 2) Pin No.
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RX210 Group Table 1.15 Pin No. 1.
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RX210 Group Table 1.15 Pin No. 1.
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RX210 Group Table 1.16 Pin No. 1.
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RX210 Group Table 1.16 1.
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RX210 Group Table 1.17 1. Overview List of Pins and Pin Functions (48-Pin LQFP) (1 / 2) Pin No.
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RX210 Group Table 1.17 1. Overview List of Pins and Pin Functions (48-Pin LQFP) (2 / 2) Pin No. Power Supply, Clock, System Control 44 VREFL0 45 I/O Port P40 46 VREFH0 47 AVCC0 48 AVSS0 Timers (MTU, TMR, POE) Communication (SCIc, SCId, RSPI, RIIC) Others AN000 Note: • Pin names to which –DS is appended are for pins that can be used to trigger release from deep software standby mode. R01DS0041EJ0150 Rev.1.
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RX210 Group 2. 2. CPU CPU Figure 2.1 shows the register set of the CPU. General-purpose register b31 b0 R0 (SP) *1 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 Control register b31 b0 ISP (Interrupt stack pointer) USP (User stack pointer) INTB (Interrupt table register) PC (Program counter) PSW (Processor status word) BPC (Backup PC) BPSW (Backup PSW) FINTV (Fast interrupt vector register) DSP instruction register b63 b0 ACC (Accumulator) Note 1.
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RX210 Group 2.1 2. CPU General-Purpose Registers (R0 to R15) This CPU has sixteen general-purpose registers (R0 to R15). R1 to R15 can be used as data registers or address registers. R0, a general-purpose register, also functions as the stack pointer (SP). The stack pointer is switched to operate as the interrupt stack pointer (ISP) or user stack pointer (USP) by the value of the stack pointer select bit (U) in the processor status word (PSW). 2.
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RX210 Group 3. Address Space 3.1 Address Space 3. Address Space This LSI has a 4-Gbyte address space, consisting of the range of addresses from 0000 0000h to FFFF FFFFh. That is, linear access to an address space of up to 4 Gbytes is possible, and this contains both program and data areas. Figure 3.1 shows the memory maps in the respective operating modes. Accessible areas will differ according to the operating mode and states of control bits. R01DS0041EJ0150 Rev.1.
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RX210 Group 3.
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RX210 Group 3.2 3. Address Space External Address Space The external address space is divided into up to four CS areas (CS0 to CS3), each corresponding to the CSn# signal output from a CSn# (n = 0 to 3) pin. Figure 3.2 shows the address ranges corresponding to the individual CS areas (CS0 to CS3) in on-chip ROM disabled extended mode.
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RX210 Group 4. 4. I/O Registers I/O Registers This section gives information on the on-chip I/O register addresses and bit configuration. The information is given as shown below. Notes on writing to registers are also given at the end. (1) I/O register addresses (address order)  Registers are listed from the lower allocation addresses.  Registers are classified according to module symbols.  Numbers of cycles for access indicate numbers of cycles of the given base clock.
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RX210 Group 4. I/O Registers  Longword-size I/O registers MOV.L #SFR_ADDR, R1 MOV.L #SFR_DATA, [R1] CMP [R1].L, R1 ;; Next process If multiple registers are written to and a subsequent instruction should be executed after the write operations are entirely completed, only read the I/O register that was last written to and execute the operation using the value; it is not necessary to read or execute operation for all the registers that were written to.
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RX210 Group 4.1 4. I/O Registers I/O Register Addresses (Address Order) Table 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group Table 4.1 4.
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RX210 Group 5. Electrical Characteristics 5. Electrical Characteristics 5.1 Absolute Maximum Ratings Table 5.1 Absolute Maximum Ratings Conditions: VSS = AVSS0 = VREFL = VREFL0 = 0 V Item Power supply voltage Input voltage (except for ports for 5 V Input voltage (ports for 5 V tolerant*1) Reference power supply voltage Analog power supply voltage tolerant*1) Symbol Value VCC –0.3 to +6.5 Vin –0.3 to VCC Unit +0.3*3 V V Vin –0.3 to +6.5 V VREFH, VREFH0 –0.3 to VCC +0.
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RX210 Group 5.2 5. Electrical Characteristics DC Characteristics Table 5.2 DC Characteristics (1) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Schmitt trigger input voltage Symbol Min. Typ. Max. Unit VIH VCC × 0.7 — 5.8 V Ports 12, 13, 16, and 17 (5 V tolerant) VCC × 0.8 — 5.8 Ports 0, 14, 15, 2 to 9, A to L, and RES# VCC × 0.8 — VCC + 0.3 VIL –0.3 — VCC × 0.3 –0.3 — VCC × 0.2 ∆VT VCC × 0.05 — — VCC × 0.
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RX210 Group Table 5.4 5. Electrical Characteristics DC Characteristics (3) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Input leakage current Symbol Min. Typ. Max. Unit Iin — — 1.0 µA Vin = 0 V, VCC µA Vin = 0 V, VCC RES#, MD pin, P35/NMI Three-state leakage current (off-state) ITSI Port 4 Input capacitance — — 1.0 Other pins except for ports for 5 V tolerant and port 4 — — 0.2 Ports for 5 V tolerant — — 1.
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RX210 Group 5. Electrical Characteristics [Chip version A] Table 5.7 DC Characteristics (6) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Supply current*1 Middle-speed operating modes 1A and 1B Normal operating mode Sleep mode No peripheral operation Max. Unit ICC 7.0 — mA 6.0 — All peripheral operation: Normal ICLK = 32 MHz*4 26 — ICLK = 20 MHz*5 18.5 — All peripheral operation: Max.
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RX210 Group 5. Electrical Characteristics Note 5. Clocks are supplied to the peripheral functions. This does not include BGO operation. The clock source is HOCO and the oscillation frequency is 40 MHz. BCLK, FCLK, and PCLK are ICLK divided by 1. Note 6. This is the increase if data is programmed to or erasing from the ROM or E2 DataFlash during program execution. Note 7. Clock supply to the peripheral functions is stopped. This does not include BGO operation.
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RX210 Group 5. Electrical Characteristics 40 Ta = 105°C, ICLK = 50 MHz*2 35 Ta = 25°C, ICLK = 50 MHz*1 30 ICC (mA) 25 20 15 10 5 0 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. All peripheral operation is normal. This does not include BGO operation. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. This does not include BGO operation. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics 4 3.5 Ta = 105°C, ICLK = 1 MHz*2 3 Ta = 25°C, ICLK = 1 MHz*1 ICC (mA) 2.5 2 1.5 1 0.5 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. All peripheral operation is normal. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics [Chip version A] Table 5.8 DC Characteristics (7) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = 0 V, Ta = –40 to +105°C Item Supply current*1 Software standby mode*2 Deep software standby mode*2 Symbol Typ.*3 Max.
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RX210 Group 5. Electrical Characteristics 100.00 Ta = 105°C*2 Ta = 85°C*2 ICC (µA) Ta = 105°C*1 Ta = 55°C*2 Ta = 85°C*1 10.00 Ta = 25°C*2 Ta = 55°C*1 Ta = 25°C*1 1.00 1.5 2.5 3.5 4.5 5.5 VCC (V) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.5 Voltage Dependency in Software Standby Mode (SOFTCUT[2:0] Bits = 111b) (Reference Data) for Chip Version A 100.
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RX210 Group 5. Electrical Characteristics 10.00 Ta = 105°C*2 ICC (µA) Ta = 105°C*1 Ta = 85°C*2 Ta = 85°C*1 Ta = 55°C*2 1.00 Ta = 55°C*1 Ta = 25°C*2 Ta = 25°C*1 0.10 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.7 Voltage Dependency in Deep Software Standby Mode (DEEPCUT1 Bit = 1) (Reference Data) for Chip Version A 10.
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RX210 Group 5. Electrical Characteristics [Chip version C] Table 5.9 DC Characteristics (8) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Supply current*1 High-speed operating mode Normal operating mode Sleep mode Symbol Typ. Max. Unit ICC 10 — mA No peripheral operation*2 ICLK = 50 MHz All peripheral operation: Normal*3 ICLK = 50 MHz 31.5 — All peripheral operation: Max.
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RX210 Group 5. Electrical Characteristics [Chip version C] Table 5.10 DC Characteristics (9) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Supply current*1 Middle-speed operating modes 1A and 1B Normal operating mode Unit ICC 7.0 — mA MHz*3 6.0 — All peripheral operation: Normal ICLK = 32 MHz*4 26 — ICLK = 20 MHz*5 18.5 — ICLK = 32 MHz*4 — 40 ICLK = 20 ICLK = 20 MHz*5 — 30 No peripheral operation ICLK = 32 MHz 5.
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RX210 Group 5. Electrical Characteristics Note 5. Clocks are supplied to the peripheral functions. This does not include BGO operation. The clock source is HOCO and the oscillation frequency is 40 MHz. BCLK, FCLK, and PCLK are ICLK divided by 1. Note 6. This is the increase if data is programmed to or erasing from the ROM or E2 DataFlash during program execution. Note 7. Clock supply to the peripheral functions is stopped. This does not include BGO operation.
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RX210 Group 5. Electrical Characteristics 40 Ta = 105°C, ICLK = 50 MHz*2 35 Ta = 25°C, ICLK = 50 MHz*1 30 ICC (mA) 25 20 15 10 5 0 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. All peripheral operation is normal. This does not include BGO operation. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. This does not include BGO operation. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics 4 3.5 Ta = 105°C, ICLK = 1 MHz*2 3 Ta = 25°C, ICLK = 1 MHz*1 ICC (mA) 2.5 2 1.5 1 0.5 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. All peripheral operation is normal. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics [Chip version C] Table 5.11 DC Characteristics (10) Conditions: VCC = AVCC0 = 1.62 to 5.
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RX210 Group 5. Electrical Characteristics 100.00 Ta = 105°C*2 Ta = 85°C*2 ICC (µA) Ta = 105°C*1 Ta = 55°C*2 Ta = 85°C*1 10.00 Ta = 25°C*2 Ta = 55°C*1 Ta = 25°C*1 1.00 1.5 2.5 3.5 4.5 5.5 VCC (V) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.13 Voltage Dependency in Software Standby Mode (SOFTCUT[2:0] Bits = 111b) (Reference Data) for Chip Version C 100.
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RX210 Group 5. Electrical Characteristics 10.00 Ta = 105°C*2 ICC (µA) Ta = 105°C*1 Ta = 85°C*2 Ta = 85°C*1 Ta = 55°C*2 1.00 Ta = 55°C*1 Ta = 25°C*2 Ta = 25°C*1 0.10 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.15 Voltage Dependency in Deep Software Standby Mode (DEEPCUT1 Bit = 1) (Reference Data) for Chip Version C 10.
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RX210 Group 5. Electrical Characteristics [Chip version B with 256 Kbytes or less of flash memory and 48 to 100 pins] Table 5.12 DC Characteristics (11) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Supply current*1 High-speed operating mode Normal operating mode Sleep mode Symbol Typ. Max. Unit ICC 7.2 — mA No peripheral operation*2 ICLK = 50 MHz All peripheral operation: Normal*3 ICLK = 50 MHz 23.5 — All peripheral operation: Max.
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RX210 Group 5. Electrical Characteristics [Chip version B with 256 Kbytes or less of flash memory and 48 to 100 pins] Table 5.13 DC Characteristics (12) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Supply current*1 Middle-speed operating modes 1A and 1B Normal operating mode Max. Unit ICC 5.3 — mA ICLK = 32 MHz*2 MHz*3 4.6 — All peripheral operation: Normal ICLK = 32 MHz*4 20.1 — ICLK = 20 MHz*5 14.
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RX210 Group 5. Electrical Characteristics Item Supply current*1 Low-speed operating mode 1 Normal operating mode Symbol Typ. Max. Unit ICC 2 — mA ICLK = 4 MHz 1.6 — ICLK = 2 MHz 1.5 — ICLK = 8 MHz 6 — ICLK = 4 MHz 3.8 — ICLK = 2 MHz 2.8 — All peripheral ICLK = 8 MHz operation: Max.*8 ICLK = 4 MHz — 12 — — ICLK = 2 MHz — — ICLK = 8 MHz 1.5 — ICLK = 4 MHz 1.4 — ICLK = 2 MHz 1.3 — ICLK = 8 MHz 3.6 — ICLK = 4 MHz 2.7 — ICLK = 2 MHz 2.2 — ICLK = 8 MHz 1.
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RX210 Group 5. Electrical Characteristics 35 Ta = 105°C, ICLK = 50 MHz*2 30 ICC (mA) 25 Ta = 25°C, ICLK = 50 MHz*1 20 15 10 5 0 2.5 3.5 4.5 5.5 VCC (V) Note 1. All peripheral operation is normal. This does not include BGO operation. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. This does not include BGO operation. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics 35 30 ICC (mA) 25 Ta = 105°C, ICLK = 32 MHz*2 Ta = 25°C, ICLK = 32 MHz*1 20 15 Ta = 105°C, ICLK = 16 MHz*2 Ta = 25°C, ICLK = 16 MHz*1 Ta = 105°C, ICLK = 8 MHz*2 Ta = 25°C, ICLK = 8 MHz*1 10 5 0 2.5 1.5 3.5 4.5 5.5 VCC (V) Note 1. All peripheral operation is normal. This does not include BGO operation. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. This does not include BGO operation.
PAGE 110
RX210 Group 5. Electrical Characteristics 160 Ta = 105°C, ICLK = 32 kHz*2 140 120 ICC (µA) 100 80 Ta = 25°C, ICLK = 32 kHz*1 60 40 20 0 1.5 2.5 3.5 4.5 5.5 VCC (V) Note 1. All peripheral operation is normal. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics [Chip version B with 256 Kbytes or less of flash memory and 48 to 100 pins] Table 5.14 DC Characteristics (13) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = 0 V, Ta = –40 to +105°C Item Supply current*1 Software standby mode*2 Flash memory power supplied, HOCO power supplied, POR low power consumption function disabled (SOFTCUT[2:0] bits = 000b) Ta = 25°C Symbol Typ.*3 Max.
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RX210 Group 5. Electrical Characteristics 100.00 Ta = 105°C*2 Ta = 85°C*2 ICC (µA) Ta = 105°C*1 Ta = 55°C*2 Ta = 85°C*1 10.00 Ta = 25°C*2 Ta = 55°C*1 Ta = 25°C*1 1.00 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics 10.00 Ta = 105°C*2 ICC (µA) Ta = 85°C*2 Ta = 105°C*1 Ta = 85°C*1 Ta = 55°C*2 1.00 Ta = 55°C*1 Ta = 25°C*2 Ta = 25°C*1 0.10 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics [Chip version B with 768 Kbytes/1 Mbyte of flash memory and 100 to 145 pins] Table 5.15 DC Characteristics (14) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Supply current*1 High-speed operating mode Normal operating mode Sleep mode Symbol Typ. Max. Unit ICC 7.8 — mA No peripheral operation*2 ICLK = 50 MHz All peripheral operation: Normal*3 ICLK = 50 MHz 29.8 — All peripheral operation: Max.
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RX210 Group 5. Electrical Characteristics [Chip version B with 768 Kbytes/1 Mbyte of flash memory and 100 to 145 pins] Table 5.16 DC Characteristics (15) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Supply current*1 Middle-speed operating modes 1A and 1B Normal operating mode Max. Unit ICC 5.6 — mA ICLK = 32 MHz*2 MHz*3 4.6 — All peripheral operation: Normal ICLK = 32 MHz*4 25.5 — ICLK = 20 MHz*5 17.
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RX210 Group 5. Electrical Characteristics Item Supply current*1 Low-speed operating mode 1 Normal operating mode Sleep mode Sleep mode Max. Unit ICC 2.1 — mA 1.7 — ICLK = 8 MHz ICLK = 2 MHz 1.5 — All peripheral operation: Normal*8 ICLK = 8 MHz 7.3 — ICLK = 4 MHz 4.5 — ICLK = 2 MHz 3.1 — All peripheral ICLK = 8 MHz operation: Max.*7 ICLK = 4 MHz — 12 — — ICLK = 2 MHz — — ICLK = 8 MHz 1.5 — ICLK = 4 MHz 1.4 — ICLK = 2 MHz 1.3 — ICLK = 8 MHz 4.
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RX210 Group 5. Electrical Characteristics 35 Ta = 105°C, ICLK = 50 MHz*2 Ta = 25°C, ICLK = 50 MHz*1 30 ICC (mA) 25 20 15 10 5 0 2.5 3.5 4.5 5.5 VCC (V) Note 1. All peripheral operation is normal. This does not include BGO operation. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. This does not include BGO operation. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics 35 30 Ta = 105°C, ICLK = 32 MHz*2 Ta = 25°C, ICLK = 32 MHz*1 ICC (mA) 25 20 Ta = 105°C, ICLK = 16 MHz*2 Ta = 25°C, ICLK = 16 MHz*1 15 Ta = 105°C, ICLK = 8 MHz*2 Ta = 25°C, ICLK = 8 MHz*1 10 5 0 1.5 2.5 3.5 4.5 5.5 VCC (V) Note 1. All peripheral operation is normal. This does not include BGO operation. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. This does not include BGO operation.
PAGE 119
RX210 Group 5. Electrical Characteristics 180 Ta = 105°C, ICLK = 32 kHz*2 160 140 ICC (µA) 120 100 80 Ta = 25°C, ICLK = 32 kHz*1 60 40 20 0 1.5 2.5 3.5 4.5 5.5 VCC (V) Note 1. All peripheral operation is normal. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics [Chip version B with 768 Kbytes/1 Mbyte of flash memory and 100 to 145 pins] Table 5.17 DC Characteristics (16) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = 0 V, Ta = –40 to +105°C Item Supply current*1 Software standby mode*2 Flash memory power supplied, HOCO power supplied, POR low power consumption function disabled (SOFTCUT[2:0] bits = 000b) Ta = 25°C Symbol Typ.*3 Max.
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RX210 Group 5. Electrical Characteristics 1000.00 Ta = 105°C*2 Ta = 85°C*2 100.00 ICC (µA) Ta = 55°C*2 Ta = 105°C*1 Ta = 25°C*2 Ta = 85°C*1 10.00 Ta = 55°C*1 Ta = 25°C*1 1.00 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics 1000.00 100.00 ICC (µA) ICC (µA) VCC = 3.3 V*2 10.00 VCC = 3.3 V*1 1.00 -40 -20 0 20 40 60 80 100 Ta (°C) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics 10.00 Ta = 105°C*2 ICC (µA) Ta = 85°C*2 Ta = 105°C*1 Ta = 85°C*1 Ta = 55°C*2 Ta = 55°C*1 Ta = 25°C*2 Ta = 25°C*1 1.00 0.10 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics [Chip version B with 512 Kbytes or less of flash memory and 144 and 145 pins] Table 5.18 DC Characteristics (17) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Supply current*1 High-speed operating mode Normal operating mode Sleep mode Symbol Typ. Max. Unit ICC 7.2 — mA No peripheral operation*2 ICLK = 50 MHz All peripheral operation: Normal*3 ICLK = 50 MHz 25.9 — All peripheral operation: Max.
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RX210 Group 5. Electrical Characteristics [Chip version B with 512 Kbytes or less of flash memory and 144 and 145 pins] Table 5.19 DC Characteristics (18) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Supply current*1 Middle-speed operating modes 1A and 1B Normal operating mode Max. Unit ICC 5.3 — mA ICLK = 32 MHz*2 MHz*3 4.6 — All peripheral operation: Normal ICLK = 32 MHz*4 22.3 — ICLK = 20 MHz*5 15.
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RX210 Group 5. Electrical Characteristics Item Supply current*1 Low-speed operating mode 1 Normal operating mode Sleep mode Sleep mode Max. Unit ICC 2.0 — mA 1.6 — ICLK = 8 MHz ICLK = 2 MHz 1.5 — All peripheral operation: Normal*8 ICLK = 8 MHz 6.4 — ICLK = 4 MHz 4.0 — ICLK = 2 MHz 2.8 — All peripheral ICLK = 8 MHz operation: Max.*8 ICLK = 4 MHz — 12 — — ICLK = 2 MHz — — ICLK = 8 MHz 1.5 — ICLK = 4 MHz 1.4 — ICLK = 2 MHz 1.3 — ICLK = 8 MHz 3.
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RX210 Group 5. Electrical Characteristics 35 Ta = 105°C, ICLK = 50 MHz*2 30 Ta = 25°C, ICLK = 50 MHz*1 ICC (mA) 25 20 15 10 5 0 2.5 3.5 4.5 5.5 VCC (V) Note 1. All peripheral operation is normal. This does not include BGO operation. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. This does not include BGO operation. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics 35 30 Ta = 105°C, ICLK = 32 MHz*2 25 ICC (mA) Ta = 25°C, ICLK = 32 MHz*1 20 15 Ta = 105°C, ICLK = 16 MHz*2 Ta = 25°C, ICLK = 16 MHz*1 10 Ta = 105°C, ICLK = 8 MHz*2 Ta = 25°C, ICLK = 8 MHz*1 5 0 1.5 2.5 3.5 4.5 5.5 VCC (V) Note 1. All peripheral operation is normal. This does not include BGO operation. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. This does not include BGO operation.
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RX210 Group 5. Electrical Characteristics 180 160 Ta = 105°C, ICLK = 32 kHz*2 140 120 ICC (µA) 100 80 Ta = 25°C, ICLK = 32 kHz*1 60 40 20 0 1.5 2.5 3.5 4.5 5.5 VCC (V) Note 1. All peripheral operation is normal. Average value of the tested middle samples during product evaluation. Note 2. All peripheral operation is maximum. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics [Chip version B with 512 Kbytes or less of flash memory and 144 and 145 pins] Table 5.20 DC Characteristics (19) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = 0 V, Ta = –40 to +105°C Item Supply current*1 Software standby mode*2 Flash memory power supplied, HOCO power supplied, POR low power consumption function disabled (SOFTCUT[2:0] bits = 000b) Ta = 25°C Symbol Typ.*3 Max.
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RX210 Group 5. Electrical Characteristics 1000.00 100.00 ICC (µA) Ta = 105°C*2 Ta = 85°C*2 Ta = 105°C*1 Ta = 55°C*2 Ta = 85°C*1 10.00 Ta = 25°C*2 Ta = 55°C*1 Ta = 25°C*1 1.00 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics 1000.00 ICC (µA) 100.00 VCC = 3.3 V*2 10.00 VCC = 3.3 V*1 1.00 -40 -20 0 20 40 60 80 100 Ta (°C) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group 5. Electrical Characteristics 10.00 Ta = 105°C*2 ICC (µA) Ta = 85°C*2 Ta = 105°C*1 Ta = 85°C*1 Ta = 55°C*2 Ta = 55°C*1 Ta = 25°C*2 Ta = 25°C*1 1.00 0.10 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VCC (V) Note 1. Average value of the tested middle samples during product evaluation. Note 2. Average value of the tested upper-limit samples during product evaluation. Figure 5.
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RX210 Group Table 5.21 5. Electrical Characteristics DC Characteristics (20) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Permissible total consumption Symbol Typ. Max. Unit Pd — 350 mW — 150 power*1 Test Conditions Ta = –40 to 85°C 85°C < Ta ≤ 105°C Note: • Please contact Renesas Electronics sales office for derating of operation under Ta = +85°C to +105°C.
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RX210 Group Table 5.25 5. Electrical Characteristics DC Characteristics (24) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL0 = 0 V, Ta = –40 to +105°C The ripple voltage must meet the allowable ripple frequency fr(VCC) within the range between the VCC upper limit (5.5 V) and lower limit (1.62 V). When VCC change exceeds VCC ±10%, the allowable voltage change rising/falling gradient dt/dVCC must be met.
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RX210 Group Table 5.27 5. Electrical Characteristics Permissible Output Currents (2) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, when total power (mW) ≥ 1000 – 10 × Ta Item Symbol Permissible output low current (average value per 1 pin) Normal output mode IOL High-drive output mode Permissible output low current (maximum value per 1 pin) Permissible output low current (total) Max. Unit 2.0 mA 4.0 Normal output mode 2.0 High-drive output mode 4.
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RX210 Group 5. Electrical Characteristics [Chip versions B and C] Table 5.31 Output Values of Voltage (4) Conditions: VCC = AVCC0 = 2.7 to 4.0 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Output low Symbol All output pins (other than RIIC) Normal output mode Min. VOL High-drive output mode RIIC pins Output high All output pins Normal output mode VOH High-drive output mode Max. Unit — 0.5 V — 0.5 Test Conditions IOL = 1.0 mA IOL = 2.0 mA — 0.4 IOL = 3.0 mA — 0.
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RX210 Group 5. Electrical Characteristics IOH/IOL vs VOH/VOL 4 3 Ta = –40°C Ta = 25°C Ta = 105°C IOH/IOL [mA] 2 1 0 0 0.5 1 1.5 2 –1 –2 Ta = 105°C –3 Ta = 25°C Ta = –40°C –4 VOH/VOL [V] Figure 5.46 VOH/VOL and IOH/IOL Temperature Characteristics at VCC = 1.62 V when Normal Output is Selected (Reference Data) IOH/IOL vs VOH/VOL 15 Ta = –40°C Ta = 25°C 10 IOH/IOL [mA] Ta = 105°C 5 0 0 0.5 1 1.5 2 2.5 3 –5 –10 Ta = 105°C Ta = 25°C –15 Ta = –40°C VOH/VOL [V] Figure 5.
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RX210 Group 5. Electrical Characteristics IOH/IOL vs VOH/VOL 25 20 Ta = –40°C Ta = 25°C IOH/IOL [mA] 15 Ta = 105°C 10 5 0 0 0.5 1 1.5 2 2.5 3 3.5 –5 –10 Ta = 105°C –15 Ta = 25°C –20 Ta = –40°C –25 VOH/VOL [V] Figure 5.48 VOH/VOL and IOH/IOL Temperature Characteristics at VCC = 3.
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RX210 Group 5.2.2 5. Electrical Characteristics Standard I/O Pin Output Characteristics (2) Figure 5.50 to Figure 5.54 show the characteristics when high-drive output is selected by the drive capacity control register. IOH/IOL vs VOH/VOL 80 VCC = 5.5 V 60 IOH/IOL [mA] 40 VCC = 3.3 V 20 VCC = 2.7 V VCC = 1.62 V 0 0 1 2 3 4 5 6 VCC = 1.62 V –20 VCC = 2.7 V VCC = 3.3 V –40 –60 VCC = 5.5 V –80 –100 VOH/VOL [V] Figure 5.
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RX210 Group 5. Electrical Characteristics IOH/IOL vs VOH/VOL 30 Ta = –40°C Ta = 25°C 20 IOH/IOL [mA] Ta = 105°C 10 0 0 0.5 1 1.5 2 2.5 3 –10 Ta = 105°C –20 Ta = 25°C Ta = –40°C –30 VOH/VOL [V] Figure 5.52 VOH/VOL and IOH/IOL Temperature Characteristics at VCC = 2.7 V when High-Drive Output is Selected (Reference Data) IOH/IOL vs VOH/VOL 40 Ta = –40°C 30 Ta = 25°C Ta = 105°C IOH/IOL [mA] 20 10 0 0 0.5 1 1.5 2 2.5 3 3.
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RX210 Group 5. Electrical Characteristics IOH/IOL vs VOH/VOL 100 Ta = –40°C 80 Ta = 25°C 60 Ta = 105°C IOH/IOL [mA] 40 20 0 0 1 2 3 4 5 6 –20 –40 –60 Ta = 105°C –80 Ta = 25°C Ta = –40°C –100 VOH/VOL [V] Figure 5.54 VOH/VOL and IOH/IOL Temperature Characteristics at VCC = 5.5 V when High-Drive Output is Selected (Reference Data) R01DS0041EJ0150 Rev.1.
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RX210 Group 5.2.3 5. Electrical Characteristics RIIC Pin Output Characteristics Figure 5.55 to Figure 5.58 show the output characteristics of the RIIC pin. IOL vs VOL [V] 70 VCC = 5.5 V 60 IOL [mA] 50 40 VCC = 3.3 V 30 VCC = 2.7 V 20 10 0 0 1 2 3 4 5 6 VOL [V] Figure 5.55 VOL and IOL Voltage Characteristics of RIIC Output Pin at Ta = 25°C (Reference Data) IOL vs VOL [V] 25 Ta = –40°C IOL [mA] 20 Ta = 25°C Ta = 105°C 15 10 5 0 0 0.5 1 1.5 2 2.5 3 VOL [V] Figure 5.
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RX210 Group 5. Electrical Characteristics IOL vs VOL [V] 40 Ta = –40°C 35 Ta = 25°C IOL [mA] 30 25 Ta = 105°C 20 15 10 5 0 0 0.5 1 1.5 2 2.5 3 3.5 VOL [V] Figure 5.57 VOL and IOL Temperature Characteristics of RIIC Output Pin at VCC = 3.3 V (Reference Data) IOL vs VOL [V] 80 Ta = –40°C 70 Ta = 25°C IOL [mA] 60 Ta = 105°C 50 40 30 20 10 0 0 1 2 3 4 5 6 VOL [V] Figure 5.58 VOL and IOL Temperature Characteristics of RIIC Output Pin at VCC = 5.
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RX210 Group 5.3 5. Electrical Characteristics AC Characteristics [Chip versions A, B, and C] Table 5.33 Operation Frequency Value (High-Speed Operating Mode) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Maximum operating frequency System clock (ICLK) FlashIF clock VCC Symbol Unit 2.7 to 5.
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RX210 Group 5. Electrical Characteristics [Chip version B] Table 5.36 Operation Frequency Value (Middle-Speed Operating Mode 2A) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Maximum operating frequency Symbol System clock (ICLK) FlashIF clock fmax (FCLK)*1 VCC 1.62 to 1.8 V 1.8 to 2.7 V 2.7 to 5.
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RX210 Group 5. Electrical Characteristics [Chip version B] Table 5.39 Operation Frequency Value (Low-Speed Operating Mode 1) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Maximum operating frequency Symbol System clock (ICLK) FlashIF clock fmax (FCLK)*1 VCC 1.62 to 1.8 V 1.8 to 2.7 V 2.7 to 5.
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RX210 Group 5. Electrical Characteristics 5.3.1 Clock Timing Table 5.41 BCLK Timing (1) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, fBCLK = up to 25 MHz (BCLK pin output frequency = up to 12.5 MHz), Ta = –40 to +105°C Item Symbol Min. Typ. Max.
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RX210 Group Table 5.44 5. Electrical Characteristics Clock Timing Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Symbol Min. Typ. Max.
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RX210 Group 5. Electrical Characteristics Note 2. When specifying the main clock oscillator stabilization time, load the MOSCWTCR register with a stabilization time value that is greater than the resonator-vendor-recommended value. When determining the main lock oscillation stabilization wait time, allow an adequate margin (2 times is recommended) for the main clock oscillation stabilization time.
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RX210 Group 5. Electrical Characteristics tBcyc tCH tCf BCLK pin output tCr tCL Test conditions: VOH = VCC × 0.7, VOL = VCC × 0.3, IOH = 1.0 mA, IOL = 1.0 mA, C = 30 pF Figure 5.59 BCLK Pin Output Timing tEXcyc tEXL tEXH EXTAL external clock input VCC × 0.5 tEXr Figure 5.60 tEXf EXTAL External Clock Input Timing MOSCCR.MOSTP tMAINOSC Main clock oscillator output tMAINOSCWT Main clock Figure 5.61 Main Clock Oscillation Start Timing LOCOCR.LCSTP tLOCOWT LOCO clock Figure 5.
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RX210 Group 5. Electrical Characteristics RES# Internal reset tRESWT OFS1.HOCOEN tHOCO1 HOCO clock Figure 5.63 HOCO Clock Oscillation Start Timing (After Reset is Canceled by Setting the OFS1.HOCOEN Bit to 0) HOCOCR.HCSTP tHOCO2 HOCO clock output tHOCOWT HOCO clock Figure 5.64 HOCO Clock Oscillation Start Timing (Oscillation is Started by Setting the HOCOCR.HCSTP Bit) HOCOPCR.HOCOPCNT HOCOCR.HCSTP tHOCOP Internal power supply for HOCO Figure 5.65 HOCO Power Control Timing R01DS0041EJ0150 Rev.1.
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RX210 Group 5. Electrical Characteristics MOSCCR.MOSTP tMAINOSC Main clock oscillator output PLLCR2.PLLEN tPLL1 PLL circuit output tPLLWT1 PLL clock Figure 5.66 PLL Clock Oscillation Start Timing (PLL is Operated after Main Clock Oscillation Has Settled) MOSCCR.MOSTP tMAINOSC Main clock oscillator output PLLCR2.PLLEN tPLL2 PLL circuit output tPLLWT2 PLL clock Figure 5.67 PLL Clock Oscillation Start Timing (PLL is Operated before Main Clock Oscillation Has Settled) PLLPCR.PLLPCNT PLLCR2.
PAGE 154
RX210 Group 5. Electrical Characteristics SOSCCR.SOSTP tSUBOSC Sub-clock oscillator output tSUBOSCWT Sub-clock Figure 5.69 Sub-clock Oscillation Start Timing R01DS0041EJ0150 Rev.1.
PAGE 155
RX210 Group 5. Electrical Characteristics 5.3.2 Reset Timing Table 5.45 Reset Timing Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Test Conditions Symbol Min. Typ. Max. Unit Power-on tRESWP 8 — — ms Figure 5.70 Deep software standby mode tRESWD 8 — — ms Figure 5.
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RX210 Group 5.3.3 5. Electrical Characteristics Timing of Recovery from Low Power Consumption Modes [Chip versions A and C] Table 5.46 Timing of Recovery from Low Power Consumption Modes Conditions: VCC = AVCC0 = 1.62 to 5.
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RX210 Group 5. Electrical Characteristics [Chip version B] Table 5.47 Timing of Recovery from Low Power Consumption Modes Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Recovery time after cancellation of software standby mode (HOCO power supplied) (SOFTCUT[2:0] bits = 000b)*1 Recovery time after cancellation of software standby mode (HOCO power not supplied) (SOFTCUT[2:0] bits = 110b)*1 Symbol Min. Typ. Max.
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RX210 Group 5. Electrical Characteristics Oscillator ICLK IRQ Software standby mode tSBYMC, tSBYPC, tSBYEX, tSBYPE, tSBYSC, tSBYHO, tSBYLO Figure 5.72 Software Standby Mode Cancellation Timing Oscillator IRQ Deep software standby reset Internal reset Deep software standby mode tDSBY tDSBYWT Exceptional reset handling starts Figure 5.73 Deep Software Standby Mode Cancellation Timing R01DS0041EJ0150 Rev.1.
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RX210 Group 5. Electrical Characteristics 5.3.4 Control Signal Timing Table 5.48 Control Signal Timing Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item NMI pulse width IRQ pulse width Symbol tNMIW tIRQW Typ. Max. Unit 200 Min. — — ns tc(PCLKB) × 2 ≤ 200 ns, Figure 5.74 Test Conditions tc(PCLKB) × 2 — — ns tc(PCLKB) × 2 > 200 ns, Figure 5.74 200 — — ns tc(PCLKB) × 2 ≤ 200 ns, Figure 5.
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RX210 Group 5. Electrical Characteristics 5.3.5 Bus Timing Table 5.49 Bus Timing (1) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, fBCLK ≤ 25 MHz (BCLK pin output frequency ≤ 12.5 MHz), Ta = –40 to +105°C, VOH = VCC × 0.5, VOL = VCC × 0.5, IOH = –1.0 mA, IOL = 1.0 mA, CL = 30 pF When normal output is selected by the drive capacity register Symbol Min. Max.
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RX210 Group Table 5.51 5. Electrical Characteristics Bus Timing (3) Conditions: VCC = AVCC0 = 1.62 to 1.8 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, fBCLK ≤ 12 MHz (BCLK pin output frequency ≤ 6 MHz), Ta = –40 to +105°C, VOH = VCC × 0.5, VOL = VCC × 0.5, IOH = –0.5 mA, IOL = 0.5 mA, CL = 30 pF When normal output is selected by the drive capacity register Symbol Min. Max.
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RX210 Group 5. Electrical Characteristics CSRWAIT:2 RDON:1 CSROFF:2 CSON:0 TW1 TW2 Tend Tn1 Tn2 BCLK Bus write strobe mode tAD tAD tAD tAD tBCD tBCD tCSD tCSD A23 to A0 1-write strobe mode A23 to A1 BC1#, BC0# Common to both byte write strobe mode and 1-write strobe mode CS3# to CS0# tRSD tRSD RD# (Read) tRDS tRDH D15 to D0 (Read) Figure 5.76 External Bus Timing/Normal Read Cycle (Bus Clock Synchronized) R01DS0041EJ0150 Rev.1.
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RX210 Group 5. Electrical Characteristics CSWWAIT:2 WRON:1 WDON:1*1 CSWOFF:2 WDOFF:1*1 CSON:0 TW1 TW2 Tend Tn1 Tn2 BCLK Byte write strobe mode tAD tAD tAD tAD tBCD tBCD tCSD tCSD A23 to A0 1-write strobe mode A23 to A1 BC1#, BC0# Common to both byte write strobe mode and 1-write strobe mode CS3# to CS0# tWRD tWRD WR1#, WR0#, WR# (Write) tWDD tWDH D15 to D0 (Write) Note 1. Set the values of WDON and WDOFF to 1 or greater. Figure 5.
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RX210 Group 5.
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RX210 Group 5. Electrical Characteristics CSRWAIT:3 CSWWAIT:3 TW1 TW2 TW3 (Tend) Tend Tn1 Th BCLK A23 to A0 CS3# to CS0# RD# (Read) WR# (Write) External wait tWTS tWTH tWTS tWTH WAIT# Figure 5.80 External Bus Timing/External Wait Control R01DS0041EJ0150 Rev.1.
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RX210 Group Table 5.52 5. Electrical Characteristics Bus Timing (Multiplexed Bus) (1) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, fBCLK ≤ 25 MHz (BCLK pin output frequency ≤ 12.5 MHz), Ta = –40 to +105°C, VOH = VCC × 0.5, VOL = VCC × 0.5, IOH = –1.0 mA, IOL = 1.0 mA, CL = 30 pF When normal output is selected by the drive capacity register Symbol Min. Typ. Max. Unit Address delay time Item tAD — 60 ns Byte control delay time tBCD — 60 ns Figure 5.
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RX210 Group Table 5.54 5. Electrical Characteristics Bus Timing (Multiplexed Bus) (3) Conditions: VCC = AVCC0 = 1.62 to 1.8 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, fBCLK ≤ 12 MHz (BCLK pin output frequency ≤ 6 MHz), Ta = –40 to +105°C, VOH = VCC × 0.5, VOL = VCC × 0.5, IOH = –0.5 mA, IOL = 0.5 mA, CL = 30 pF When normal output is selected by the drive capacity register Symbol Min. Typ. Max. Unit Address delay time Item tAD — 125 ns Byte control delay time tBCD — 125 ns Figure 5.
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RX210 Group 5.
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RX210 Group 5. Electrical Characteristics 5.3.6 Timing of On-Chip Peripheral Modules Table 5.55 Timing of On-Chip Peripheral Modules (1) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C When high-drive output is selected by the drive capacity register Item I/O ports Input data pulse width MTU/ TPU Input capture input pulse width Single-edge setting Min. Max. Unit tPRW 1.5 — tPcyc Figure 5.83 tTICW 1.5 — tPcyc Figure 5.84 2.5 — 1.
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RX210 Group 5. Electrical Characteristics [512 Kbytes or less of flash memory and 48 to 100 pins] Table 5.56 Timing of On-Chip Peripheral Modules (2) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C When high-drive output is selected by the drive capacity register Item RSPI RSPCK clock cycle Symbol Master tSPcyc Slave RSPCK clock high pulse width Master Master Output 1.8 V ≤ VCC < 2.7 V (tSPcyc – tSPCKr – tSPCKf)/2 – 3 — 1.62 V ≤ VCC < 1.
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RX210 Group 5. Electrical Characteristics Item RSPI MOSI and MISO rise/ fall time Output SSL rise/fall time Output Min. Max. tDr, tDf — 20 ns — 1 μs tSSLr, tSSLf — 20 ns — 1 μs tSA — 6 tPcyc Input Input 2.7 V ≤ VCC ≤ 5.5 V Slave access time Slave output release time 1.8 V ≤ VCC < 2.7 V — 7 1.62 V ≤ VCC < 1.8 V — 7 2.7 V ≤ VCC ≤ 5.5 V Unit*1 Symbol — 5 1.8 V ≤ VCC < 2.7 V tREL — 6 1.62 V ≤ VCC < 1.8 V — 6 Test Conditions C = 30 pF Figure 5.92 to Figure 5.
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RX210 Group 5. Electrical Characteristics Item RSPI Symbol Data input setup time Master 2.7 V ≤ VCC ≤ 5.5 V tSU 1.8 V ≤ VCC < 2.7 V 1.62 V ≤ VCC < 1.8 V Slave Data input hold time SSL setup time Master MOSI and MISO rise/ fall time — 30 — 25 – tPcyc — PCLKB set to divided by 2*2 tHF 0 — Slave tH 20 + 2 × tPcyc — Master tLEAD Master tLAG Master 2.7 V ≤ VCC ≤ 5.5 V tOD 1 8 tSPcyc 4 — tPcyc ns 1.62 V ≤ VCC < 1.8 V — 25 2.7 V ≤ VCC ≤ 5.5 V — 3 × tPcyc + 65 1.
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RX210 Group Table 5.58 5. Electrical Characteristics Timing of On-Chip Peripheral Modules (4) Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C When high-drive output is selected by the drive capacity register Symbol Min. Max. Unit*1 tSPcyc 4 65536 tPcyc 6 65536 SCK input clock high pulse width tSPCKWH 0.4 0.6 tSPcyc SCK input clock low pulse width tSPCKWL 0.4 0.
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RX210 Group Table 5.59 5. Electrical Characteristics Timing of On-Chip Peripheral Modules (5) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, fPCLKB = up to 32 MHz, Ta = –40 to +105°C Symbol Min.*1,*2 Max.
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RX210 Group Table 5.60 5. Electrical Characteristics Timing of On-Chip Peripheral Modules (6) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, fPCLKB = up to 32 MHz, Ta = –40 to +105°C When high-drive output is selected by the drive capacity register Symbol Min.*1 Max.
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RX210 Group 5. Electrical Characteristics PCLK Port tPRW Figure 5.83 I/O Port Input Timing PCLK Output compare output Input capture input Figure 5.84 tTICW MTU/TPU Input/Output Timing PCLK MTCLKA to MTCLKD tTCKWL Figure 5.85 tTCKWH MTU/TPU Clock Input Timing PCLK POEn# input tPOEW Figure 5.86 POE# Input Timing R01DS0041EJ0150 Rev.1.
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RX210 Group 5. Electrical Characteristics PCLK TMCI0 to TMCI3 tTMCWL Figure 5.87 tTMCWH 8-Bit Timer Clock Input Timing tSCKW tSCKr tSCKf SCKn (n = 0 to 12) tScyc Figure 5.88 SCK Clock Input Timing SCKn tTXD TXDn tRXS tRXH RXDn n = 0 to 12 Figure 5.89 SCI Input/Output Timing: Clock Synchronous Mode PCLK ADTRG0# tTRGW Figure 5.90 A/D Converter External Trigger Input Timing R01DS0041EJ0150 Rev.1.
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RX210 Group 5. Electrical Characteristics RSPI Simple SPI RSPCKA Master select output SCKn Master select output tSPCKr tSPCKWH VOH VOH VOL tSPCKf VOH VOH VOL tSPCKWL VOL tSPcyc tSPCKr tSPCKWH VIH RSPCKA Slave select input SCKn Slave select input VIH VIL (n = 0 to 12) tSPCKf VIH VIL tSPCKWL VIH VIL tSPcyc VOH = 0.7 × VCC, VOL = 0.3 × VCC, VIH = 0.7 × VCC, VIL = 0.3 × VCC Figure 5.91 RSPI Clock Timing and Simple SPI Clock Timing R01DS0041EJ0150 Rev.1.
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RX210 Group RSPI 5. Electrical Characteristics Simple SPI tTD SSLA0 to SSLA3 output tLEAD RSPCKA CPOL = 0 output SCKn CKPOL = 0 output RSPCKA CPOL = 1 output SCKn CKPOL = 1 output tLAG tSSLr, tSSLf tSU MISOA input SMISOn input tH MSB IN DATA tDr, tDf MOSIA output SMOSIn output LSB IN tOH MSB OUT MSB IN tOD DATA LSB OUT IDLE MSB OUT (n = 0 to 12) Figure 5.
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RX210 Group RSPI 5. Electrical Characteristics Simple SPI tTD SSLA0 to SSLA3 output tLEAD RSPCKA CPOL = 0 output SCKn CKPOL = 0 output RSPCKA CPOL = 1 output SCKn CKPOL = 1 output tLAG tSSLr, tSSLf tSU MISOA input SMISOn input tH MSB IN DATA tOH MOSIA output SMOSIn output LSB IN tOD MSB OUT MSB IN tDr, tDf DATA LSB OUT IDLE MSB OUT (n = 0 to 12) Figure 5.
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RX210 Group 5. Electrical Characteristics RSPI Simple SPI SSLA0 input SSn# input tTD tLEAD RSPCKA CPOL = 0 input SCKn CKPOL = 0 input RSPCKA CPOL = 1 input SCKn CKPOL = 1 input MISOA output SMISOn output tLAG tSA tOH MSB OUT tSU MOSIA input tOD SMOSIn input tREL DATA LSB OUT tH MSB IN MSB OUT tDr, tDf MSB IN DATA LSB IN MSB IN (n = 0 to 12) Figure 5.
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RX210 Group 5. Electrical Characteristics VIH SDA VIL tBUF tSCLH tSTAS tSTAH tSTOS tSP SCL P*1 S*1 tSCLL tSr tSf tSCL tSDAS tSDAH Note 1. S, P, and Sr indicate the following conditions, respectively. S : Start condition P : Stop condition Sr : Restart condition Figure 5.98 P*1 Sr*1 Test conditions VIH = VCC × 0.7, VIL = VCC × 0.3 RIIC Bus Interface Input/Output Timing and Simple IIC Bus Interface Input/Output Timing R01DS0041EJ0150 Rev.1.
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RX210 Group 5.4 5. Electrical Characteristics A/D Conversion Characteristics Table 5.61 A/D Conversion Characteristics (1) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VREFH0 ≥ 2.7 V, AVCC0-0.9 V ≤ VREFH0 ≤ AVCC0*3, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item A/D conversion clock frequency (fPCLKD) Resolution Min. Typ. Max. Unit 1 — 50 MHz Test Conditions — — 12 Bit Permissible signal source impedance (Max.) = 0.5 kΩ 1.0 (0.
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RX210 Group Table 5.62 5. Electrical Characteristics Channel Classification for A/D Converter Classification High-precision channel Normal-precision channel Table 5.63 Channel Channel-Dedicated Sample-and-Hold Circuit Conditions AN000 to AN002 Used AVCC0 = 2.7 to 5.5 V AVCC0 - 0.9 V ≤ VREFH0 ≤ AVCC0 VREFH0 ≥ 2.7 V AVSS0 = VREFL0 = 0 V 0.25 V ≤ VAN ≤ AVCC0 - 0.25 V VAN ≤ VREFH0 Not used AN003 to AN007 — AN008 to AN015 — AVCC0 = 1.62 to 5.5 V When AVCC0 ≥ 1.8 V, AVCC0 - 0.
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RX210 Group Table 5.64 5. Electrical Characteristics A/D Conversion Characteristics (2) Conditions: VCC = AVCC0 = 1.8 to 3.6 V, 1.8 V ≤ VREFH0 ≤ 2.7 V, AVCC0-0.9 V ≤ VREFH0 ≤ AVCC0*3, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item A/D conversion clock frequency (fPCLKD) Resolution Conversion time*1 (Operation at fPCLKD = 25 MHz) Min. Typ. Max. Unit 1 — 25 MHz — — 12 Bit Permissible signal source impedance (Max.) = 1 kΩ 2.0 (0.
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RX210 Group Table 5.66 5. Electrical Characteristics Sampling Time Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Sampling time Symbol High-precision channel Ts Normal-precision channel Typ. Unit Test Conditions 0.2 + 0.14 × R0 (KΩ) µs Figure 5.100 0.35 + 0.14 × R0 (KΩ) RX210 R0 ANi Figure 5.100 Internal Equivalent Circuit of Analog Input Pin R01DS0041EJ0150 Rev.1.
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RX210 Group 5.
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RX210 Group 5. Electrical Characteristics Differential nonlinearity error (DNL) Differential nonlinearity error is the difference between 1-LSB width based on the ideal A/D conversion characteristics and the width of the actually output code. Offset error Offset error is the difference between a transition point of the ideal first output code and the actual first output code.
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RX210 Group 5.5 5. Electrical Characteristics D/A Conversion Characteristics Table 5.67 D/A Conversion Characteristics (1) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VREFH = 2.7 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V, fPCLKB = up to 32 MHz, Ta = –40 to +105°C Item Resolution Min. Typ. Max. Unit — — 10 Bit Test Conditions Conversion time — — 3.0 µs Absolute accuracy — ±3.0 ±5.0 LSB 4-MΩ resistive load — — ±4.0 LSB 8-MΩ resistive load — 4.
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RX210 Group 5.
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RX210 Group 5.8 5. Electrical Characteristics Power-on Reset Circuit and Voltage Detection Circuit Characteristics Table 5.71 Power-on Reset Circuit and Voltage Detection Circuit Characteristics (1) Conditions: VCC = AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Voltage detection level Power-on reset (POR) Low power consumption function disabled*1 Symbol Min. Typ. Max. Unit Test Conditions VPOR 1.30 1.40 1.55 V Figure 5.103 and Figure 5.104 1.00 1.20 1.
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RX210 Group Table 5.72 5. Electrical Characteristics Power-on Reset Circuit and Voltage Detection Circuit Characteristics (2) Conditions: VCC = AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Voltage detection level Internal reset time Voltage detection circuit (LVD2)*1 Symbol Min. Typ. Max. Unit V Vdet2_0 4.00 4.15 4.30 Vdet2_1 3.85 4.00 4.15 Vdet2_2 3.70 3.85 4.00 Vdet2_3 3.55 3.70 3.85 Vdet2_4 3.40 3.55 3.70 Vdet2_5 3.25 3.40 3.55 Vdet2_6 3.10 3.
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RX210 Group 5. Electrical Characteristics tVOFF VCC VPOR Internal reset signal (active-low) tdet tdet tPOR Figure 5.103 Voltage Detection Reset Timing VPOR VCC 0.9 V tw(por) Internal reset signal (active-low) *1 tdet tPOR Note 1. tw(por) is the time required for a power-on reset to be enabled while the external power VCC is being held below the valid voltage (0.9 V). When VCC turns on, maintain tw(por) for 1 ms or more. Figure 5.
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RX210 Group 5. Electrical Characteristics tVOFF VCC VLVH Vdet1 LVD1E Td(E-A) LVD1 Comparator output LVD1CMPE LVD1MON Internal reset signal (active-low) When LVD1RN = L tdet tdet tLVD1 When LVD1RN = H tLVD1 Figure 5.106 Voltage Detection Circuit Timing (Vdet1) tVOFF VCC VLVH Vdet2 LVD2E Td(E-A) LVD2 Comparator output LVD2CMPE LVD2MON Internal reset signal (active-low) When LVD2RN = L tdet tdet tLVD2 When LVD2RN = H tLVD2 Figure 5.
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RX210 Group 5.9 5. Electrical Characteristics Oscillation Stop Detection Timing Table 5.73 Oscillation Stop Detection Circuit Characteristics Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Detection time Symbol Min. Typ. Max. Unit Test Conditions tdr — — 1 ms Figure 5.108 Main clock or PLL clock tdr OSTDSR.OSTDF LOCO clock ICLK Figure 5.108 Oscillation Stop Detection Timing R01DS0041EJ0150 Rev.1.
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RX210 Group 5.10 5. Electrical Characteristics ROM (Flash Memory for Code Storage) Characteristics [Chip version A] Table 5.74 ROM (Flash Memory for Code Storage) Characteristics (1) Item Reprogramming/erasure cycle*1 Data hold time Symbol Min. Typ. Max. Unit NPEC 1000 — — Times tDRP 10*2 — — Year Conditions Note 1. Definition of reprogram/erase cycle: The reprogram/erase cycle is the number of erasing for each block.
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RX210 Group 5. Electrical Characteristics [Chip versions A and C] Table 5.76 ROM (Flash Memory for Code Storage) Characteristics (3) : high-speed operating mode, middle-speed operating mode 1A Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VREFH = VREFH0 = AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V Temperature range for the programming/erasure operation: Ta = –40 to +105°C Item Programming time when NPEC ≤ 100 times Symbol FCLK = 32 MHz Min. Typ. Max. Min. Typ. Max. 2 bytes tP2 — 0.52 4.8 — 0.
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RX210 Group 5. Electrical Characteristics [Chip versions A and C] Table 5.77 ROM (Flash Memory for Code Storage) Characteristics (4) : middle-speed operating mode 1B Conditions: VCC = AVCC0 = 1.62 to 3.6 V, VREFH = VREFH0 = AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V Temperature range for the programming/erasure operation: Ta = –40 to +105°C Item Programming time when NPEC ≤ 100 times Symbol Min. Typ. Max. Min. Typ. Max. 2 bytes tP2 — 0.69 6.0 — 0.30 3.5 8 bytes tP8 — 0.69 6.0 — 0.
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RX210 Group 5. Electrical Characteristics [Chip version B] Table 5.78 ROM (Flash Memory for Code Storage) Characteristics (5) : middle-speed operating modes 1A and 2A Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VREFH = VREFH0 = AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V Temperature range for the programming/erasure operation: Ta = –40 to +105°C Item Programming time when NPEC ≤ 100 times Symbol FCLK = 32 MHz Min. Typ. Max. Min. Typ. Max. 2 bytes tP2 — 0.19 4.3 — 0.12 2.0 8 bytes tP8 — 0.
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RX210 Group 5. Electrical Characteristics [Chip version B] Table 5.79 ROM (Flash Memory for Code Storage) Characteristics (6) : middle-speed operating modes 1B and 2B Conditions: VCC = AVCC0 = 1.62 to 3.6 V, VREFH = VREFH0 = AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V Temperature range for the programming/erasure operation: Ta = –40 to +105°C Item Programming time when NPEC ≤ 100 times Symbol Min. Typ. Max. Min. Typ. Max. 2 bytes tP2 — 0.25 5.0 — 0.21 2.8 8 bytes tP8 — 0.25 5.3 — 0.
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RX210 Group 5.11 5. Electrical Characteristics E2 DataFlash Characteristics [Chip version A] Table 5.80 E2 DataFlash Characteristics (1) Item Reprogramming/erasure cycle*1 Data hold time Symbol Min. Typ. Max. Unit NDPEC 100000 — — Times tDRP 10*2 — — Year Conditions Note 1. The reprogram/erase cycle is the number of erasing for each block. When the reprogram/erase cycle is n times (n = 100000), erasing can be performed n times for each block.
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RX210 Group 5. Electrical Characteristics [Chip versions A and C] Table 5.82 E2 DataFlash Characteristics (3) : high-speed operating mode, middle-speed operating mode 1A Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VREFH = VREFH0 = AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V Temperature range for the programming/erasure operation: Ta = –40 to +105°C Item Symbol FCLK = 4 MHz FCLK = 32 MHz Min. Typ. Max. Min. Typ. Max. Programming time when NDPEC ≤ 100 times 2 bytes tDP2 — 0.40 4.4 — 0.16 2.
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RX210 Group 5. Electrical Characteristics [Chip versions A and C] Table 5.83 E2 DataFlash Characteristics (4) : middle-speed operating mode 1B Conditions: VCC = AVCC0 = 1.62 to 3.6 V, VREFH = VREFH0 = AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V Temperature range for the programming/erasure operation: Ta = –40 to +105°C Item Symbol FCLK = 32 MHz*1 FCLK = 4 MHz Min. Typ. Max. Min. Typ. Max. Programming time when NDPEC ≤ 100 times 2 bytes tDP2 — 0.52 5.1 — 0.24 2.8 8 bytes tDP8 — 0.57 6.
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RX210 Group 5. Electrical Characteristics [Chip version B] Table 5.84 E2 DataFlash Characteristics (5) : high-speed operating mode, middle-speed operating modes 1A and 2A Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VREFH = VREFH0 = AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V Temperature range for the programming/erasure operation: Ta = –40 to +105°C Item Symbol FCLK = 4 MHz FCLK = 32 MHz Min. Typ. Max. Min. Typ. Max. Programming time when NDPEC ≤ 100 times 2 bytes tDP2 — 0.19 4.4 — 0.13 2.
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RX210 Group 5. Electrical Characteristics [Chip version B] Table 5.85 E2 DataFlash Characteristics (6) : middle-speed operating modes 1B and 2B Conditions: VCC = AVCC0 = 1.62 to 3.6 V, VREFH = VREFH0 = AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V Temperature range for the programming/erasure operation: Ta = –40 to +105°C Item Symbol FCLK = 32 MHz*1 FCLK = 4 MHz Min. Typ. Max. Min. Typ. Max. Programming time when NDPEC ≤ 100 times 2 bytes tDP2 — 0.28 5.1 — 0.20 2.8 8 bytes tDP8 — 0.32 6.
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RX210 Group 5. Electrical Characteristics In suspend priority mode • Suspension during programming FCU command Program Suspend Resume Suspend Resume tSPSD1 FSTATR0.FRDY Ready Programming pulse Suspend tSPSD2 Resume tSPSD1 Not Ready Not Ready Not Ready Programming Programming Programming Application of the pulse stops Application of the pulse continues • Suspension during erasure FCU command Erase Suspend Resume Suspend Resume tSESD1 FSTATR0.
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RX210 Group Appendix 1. Package Dimensions Appendix 1. Package Dimensions Information on the latest version of the package dimensions or mountings has been displayed in “Packages” on Renesas Electronics Corporation website. JEITA Package Code P-TFLGA145-7x7-0.50 RENESAS Code PTLG0145KA-A Previous Code 145F0G MASS[Typ.] 0.
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RX210 Group Appendix 1. Package Dimensions JEITA Package Code P-LFQFP144-20x20-0.50 RENESAS Code PLQP0144KA-A Previous Code 144P6Q-A / FP-144L / FP-144LV MASS[Typ.] 1.2g HD *1 D 108 73 109 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
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RX210 Group Appendix 1. Package Dimensions JEITA Package Code P-TFLGA100-7x7-0.65 RENESAS Code PTLG0100JA-A Previous Code 100F0G MASS[Typ.] 0.1g w S B φ b1 D φ× M S φb w S A ZD AB e A e A AB φ× M S K J H G B E F E D C B ×4 y S v Index mark (Laser mark) Figure C S ZE A 1 2 3 Index mark 4 5 6 7 8 9 10 Reference Dimension in Millimeters Symbol Min Nom D 7.0 E 7.0 v w A e 0.65 b 0.31 0.35 b1 0.385 0.435 x y ZD 0.575 ZE 0.575 Max 0.15 0.20 1.05 0.39 0.485 0.08 0.
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RX210 Group Appendix 1. Package Dimensions JEITA Package Code P-TFLGA100-5.5x5.5-0.50 RENESAS Code PTLG0100KA-A Previous Code 100F0M MASS[Typ.] 0.1g φ b1 φ× M w S B φb D w S A S AB φ× M A S AB e ZD e A K J H G B E F E D C B ZE A 1 x4 v y S Index mark Index mark (Laser mark) Figure D 2 S 3 4 5 6 7 8 9 Reference Symbol 10 D E v w A e b b1 x y ZD ZE Dimension in Millimeters Nom Max 5.5 5.5 0.15 0.20 1.05 0.5 0.21 0.25 0.29 0.29 0.34 0.39 0.08 0.08 0.5 0.
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RX210 Group Appendix 1. Package Dimensions JEITA Package㻌 code RENESAS㻌 Code Previous㻌 Code MASS(TYP.)[g] S-WFBGA69-3.91x4.26-0.40 SWBG0069LA-A 䠉 0.02 $ $ % & % ' ( ) * + - Y Q ȭE ȭ[ 0 6 $% 6 6($7,1* 3/$1( Dimensions in millimeters Term \ 6 Package length Specification Reference Symbol Min Nom Max D 3.86 3.91 3.96 Package width E 4.21 4.26 4.31 Overhang dimension in length ZD 0.305 0.355 0.405 Overhang dimension in width ZE 0.48 0.
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RX210 Group Appendix 1. Package Dimensions JEITA Package Code P-TFLGA64-6x6-0.65 RENESAS Code PTLG0064JA-A Previous Code 64F0G MASS[Typ.] 0.07g w S B b1 S AB b D S w S A AB e A e H G F E E D C B A y S x4 v Index mark (Laser mark) Figure F 1 2 3 Index mark 4 5 6 7 8 Reference Dimension in Millimeters Symbol Min D E v w A e b b1 x y Nom Max 6.0 6.0 0.15 0.20 1.05 0.65 0.31 0.35 0.39 0.39 0.43 0.47 0.08 0.10 64-Pin TFLGA (PTLG0064JA-A) R01DS0041EJ0150 Rev.1.
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RX210 Group Appendix 1. Package Dimensions JEITA Package Code P-LFQFP100-14x14-0.50 RENESAS Code PLQP0100KB-A Previous Code 100P6Q-A / FP-100U / FP-100UV MASS[Typ.] 0.6g HD *1 D 51 75 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
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RX210 Group Appendix 1. Package Dimensions JEITA Package Code P-LFQFP80-12x12-0.50 RENESAS Code PLQP0080KB-A Previous Code 80P6Q-A MASS[Typ.] 0.5g HD *1 D 60 41 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
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RX210 Group Appendix 1. Package Dimensions JEITA Package Code P-LQFP80-14x14-0.65 RENESAS Code PLQP0080JA-A Previous Code FP-80W / FP-80WV MASS[Typ.] 0.6g HD *1 D 41 60 61 40 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
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RX210 Group Appendix 1. Package Dimensions JEITA Package Code P-LFQFP64-10x10-0.50 RENESAS Code PLQP0064KB-A Previous Code 64P6Q-A / FP-64K / FP-64KV MASS[Typ.] 0.3g HD *1 D 48 33 49 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
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RX210 Group Appendix 1. Package Dimensions JEITA Package Code P-LQFP64-14x14-0.80 RENESAS Code PLQP0064GA-A Previous Code 64P6U-A/ ⎯ MASS[Typ.] 0.7g HD *1 D 33 48 49 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
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RX210 Group Appendix 1. Package Dimensions JEITA Package Code P-LFQFP48-7x7-0.50 RENESAS Code PLQP0048KB-A Previous Code 48P6Q-A MASS[Typ.] 0.2g HD *1 D 36 25 37 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. 24 bp c c1 *2 E HE b1 Reference Dimension in Millimeters Symbol 48 13 1 ZE Terminal cross section 12 c A F A2 Index mark ZD S A1 L D E A2 HD HE A A1 bp b1 c c1 e Figure L *3 bp Detail F x 8.8 8.8 0 0.
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REVISION HISTORY RX210 Group REVISION HISTORY REVISION HISTORY Rev. 0.50 0.90 1.20 1.30 RX210 Group Datasheet Description Summary Date Page Apr.15, 2011 — Aug.10, 2011 1. Overview 4 17, 21, 24, 26 2. CPU 51 First edition, issued Table 1.1 Outline of Specifications: Power supply voltage/ Operating frequency, changed Table 1.5 to Table 1.8 List of Pins and Pin Functions (Pin name: LVCMP2  CMPA2), changed Table 2.
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RX210 Group Rev. Date 1.30 Jan 22, 2013 1.40 Feb 19, 2013 REVISION HISTORY Description Summary Table 1.6 List of Products Chip Version C: D Version (Ta = -40 to +85°C), Table 1.7 List of Products Chip Version C: G Version (Ta = -40 to +105°C), changed 12 Figure 1.1 How to Read the Product Part No., Memory Capacity, and Package Type, changed 13 Figure 1.2 Block Diagram, changed 14 to 17 Table 1.8 Pin Functions, changed 18 Figure 1.
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RX210 Group Rev. 1.40 1.50 REVISION HISTORY Description Summary Feb 19, 2013 Table 5.11 DC Characteristics (10), changed Table 5.14 DC Characteristics (13), changed Table 5.17 DC Characteristics (16), changed Figure 5.31 Voltage Dependency in Software Standby Mode (SOFTCUT[2:0] Bits = 110b) (Reference Data) for Chip Version B with 768 Kbytes/1 Mbyte of Flash Memory and 100 to 145 Pins, changed 116 Figure 5.
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General Precautions in the Handling of MPU/MCU Products The following usage notes are applicable to all MPU/MCU products from Renesas. For detailed usage notes on the products covered by this document, refer to the relevant sections of the document as well as any technical updates that have been issued for the products. 1. Handling of Unused Pins Handle unused pins in accord with the directions given under Handling of Unused Pins in the manual.
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Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2.