Datasheet

CHAPTER 5 CLOCK GENERATORS
User’s Manual U18172EJ3V0UD
85
Figure 5-11. Status Transition of Default Start by Crystal/Ceramic Oscillation ( μ PD78F920x Only)
HALT STOP
HALT
instruction
STOP
instruction
Start with PCC = 02H,
PPCC = 02H
Interrupt
Reset signal
Interrupt
Power
application
Clock division ratio
variable during
CPU operation
Wait for clock
oscillation stabilization
Crystal/ceramic
oscillation selected
by option byte
Reset by
power-on clear
V
DD > 2.1 V ±0.1 V
Remark PCC: Processor clock control register
PPCC: Preprocessor clock control register