Datasheet

CHAPTER 3 CPU ARCHITECTURE
User’s Manual U18172EJ3V0UD
35
Figure 3-6. Data Memory Addressing ( μ PD78F9202, 78F9502)
Special function registers (SFR)
256 × 8 bits
Internal high-speed RAM
128 × 8 bits
Flash memory
4,096 × 8 bits
Use prohibted
Direct addressing
Register indirect addressing
Based addressing
SFR addressing
Short direct addressing
FFFFH
FF00H
FEFFH
FF20H
FE1FH
FE80H
FE7FH
1000H
0FFFH
0000H
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