Datasheet

APPENDIX D LIST OF CAUTIONS
User’s Manual U18172EJ3V0UD
333
(12/15)
Chapter
Classification
Function Details of
Function
Cautions Page
Chapter 14
Soft
Low-
voltage
detector
Cautions for
low-voltage
detector
In a system where the supply voltage (VDD) fluctuates for a certain period in the
vicinity of the LVI detection voltage (V
LVI), the operation is as follows depending
on how the low-voltage detector is used.
<1> When used as reset
The system may be repeatedly reset and released from the reset status.
In this case, the time from release of reset to the start of the operation of the
microcontroller can be arbitrarily set by taking action (1) below.
<2> When used as interrupt
Interrupt requests may be frequently generated. Take (b) of action (2) below.
p. 215
Oscillation
stabilization
time on power
application or
after reset
release
(
μ PD78F920x)
The setting of this option is valid only when the crystal/ceramic oscillation clock is
selected as the system clock source. No wait time elapses if the high-speed
internal oscillation clock or external clock input is selected as the system clock
source.
p. 220
Control of
RESET pin
(
μ PD78F920x)
Because the option byte is referenced after reset release, if a low level is input to
the RESET pin before the option byte is referenced, then the reset state is not
released.
Also, when setting 0 to RMCE, connect the pull-up resistor.
p. 220
Control of
RESET pin
(
μ PD78F950x)
Because the option byte is referenced after reset release, if a low level is input to
the RESET pin before the option byte is referenced, then the reset state is not
released.
When used as an input-only port (P34), the setting of the on-chip pull-up resistor
can be done by PU34 on PU3 register.
p. 222
Selection of
system clock
source
(
μ PD78F920x)
Because the X1 and X2 pins are also used as the P23/ANI3 and P22/ANI2 pins,
the conditions under which the X1 and X2 pins can be used differ depending on
the selected system clock source.
(1) Crystal/ceramic oscillation clock is selected
The X1 and X2 pins cannot be used as I/O port pins or analog input pins of A/D
converter because they are used as clock input pins.
(2) External clock input is selected
Because the X1 pin is used as an external clock input pin, P121 cannot be used
as an I/O port pin or an analog input pin of A/D converter.
(3) High-speed internal oscillation clock is selected
P23/ANI3 and P22/ANI2 pins can be used as I/O port pins or analog input pins of
A/D converter.
p. 220
Selection of
system clock
source
(
μ PD78F950x)
Because the EXCLK pin is also used as the P23 pin, the condition under which
the EXCLK pin can be used differ depending on the selected system clock
source.
(1) External clock input is selected
Because the pin is used as an external clock input pin, P23 cannot be used as an
I/O port pin.
(2) High-speed internal oscillation clock is selected
P23 pin can be used as an I/O port pin.
p. 222
Chapter 15
Hard
Option
byte
Low-speed
internal
oscillates
If it is selected that low-speed internal oscillator cannot be stopped, the count
clock to the watchdog timer (WDT) is fixed to low-speed internal oscillation clock.
pp. 221,
223