Datasheet

CHAPTER 19 ELECTRICAL SPECIFICATIONS
User’s Manual U18172EJ3V0UD
304
A/D Converter Characteristics (TA = −40 to +85°C, 2.7 V ≤ VDD ≤ 5.5 V
Note 1
, VSS = 0 V
Note 2
) ( μ PD78F920x only)
(1) A/D converter basic characteristics
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Resolution 10 10 10 bit
4.5 V ≤ VDD ≤ 5.5 V 3.0 100 μ s
4.0 V ≤ VDD < 4.5 V 4.8 100 μ s
2.85 V ≤ VDD < 4.0 V 6.0 100 μ s
Conversion time tCONV
2.7 V ≤ V
DD < 2.85 V 14.0 100 μ s
Analog input voltage VAIN VSS
Note 2
VDD V
(2) A/D Converter Characteristics (high-speed internal oscillation clock)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Overall error
Notes 3, 4
AINL −0.1 to +0.2
Note 5
−0.35 to +0.45 %FSR
Zero-scale error
Notes 3, 4
Ezs −0.1 to +0.2
Note 5
−0.35 to +0.45 %FSR
Full-scale error
Notes 3, 4
Efs −0.1 to +0.2
Note 5
−0.35 to +0.40 %FSR
Integral non-linearity error
Note 3
ILE ±1
Note 5
±3 LSB
Differential non-linearity error
Note 3
DLE ±1
Note 5
±1.5 LSB
(3) A/D Converter Characteristics (Crystal/Ceramic Oscillation Clock, External Clock)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
4.0 V ≤ VDD ≤ 5.5 V − 0.20 to +0.35
Note 5
−0.35 to +0.65 %FSR Overall error
Notes 3, 4
AINL
2.7 V ≤ V
DD < 4.0 V ±0.25
Note 5
−0.35 to +0.55 %FSR
4.0 V ≤ VDD ≤ 5.5 V − 0.20 to +0.35
Note 5
−0.35 to +0.65 %FSR Zero-scale error
Notes 3, 4
Ezs
2.7 V ≤ V
DD < 4.0 V ±0.25
Note 5
−0.35 to +0.55 %FSR
4.0 V ≤ VDD ≤ 5.5 V − 0.20 to +0.35
Note 5
−0.35 to +0.55 %FSR Full-scale error
Notes 3, 4
Efs
2.7 V ≤ V
DD < 4.0 V ±0.25
Note 5
−0.35 to +0.50 %FSR
4.0 V ≤ VDD ≤ 5.5 V ±1.5
Note 5
±3.0 LSB Integral non-linearity error
Note 3
ILE
2.7 V ≤ V
DD < 4.0 V ±1.5
Note 5
±4.0 LSB
4.0 V ≤ VDD ≤ 5.5 V ±1.0
Note 5
±2.5 LSB Differential non-linearity error
Note 3
DLE
2.7 V ≤ V
DD < 4.0 V ±1.0
Note 5
±2.5 LSB
Notes 1. In μ PD78F920x, VDD functions alternately as the A/D converter reference voltage input. When using the
A/D converter, stabilize V
DD at the supply voltage used (2.7 to 5.5 V).
2. In
μ PD78F920x, VSS functions alternately as the ground potential of the A/D converter. Be sure to
connect VSS to a stabilized GND (= 0 V).
3. Excludes quantization error (±1/2 LSB).
4. This value is indicated as a ratio (%FSR) to the full-scale value.
5. A value when HALT mode is set by an instruction immediately after A/D conversion starts.
Caution The conversion accuracy may be degraded when the analog input pin is used as an alternate I/O port
or if the level of a port that is not used for A/D conversion is changed during A/D conversion.
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