Datasheet

CHAPTER 19 ELECTRICAL SPECIFICATIONS
User’s Manual U18172EJ3V0UD
301
AC Characteristics
Basic operation (TA = 40 to +85°C, VDD = 2.0 to 5.5 V
Note 1
, VSS = 0 V)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
4.0 V VDD 5.5 V 0.2 16
μ
s
3.0 V VDD < 4.0 V 0.33 16
μ
s
2.7 V VDD < 3.0 V 0.4 16
μ
s
Crystal/ceramic oscillation
clock
Note 2
, external clock
input
2.0 V V
DD < 2.7 V 1 16
μ
s
4.0 V VDD 5.5 V 0.23 4.22
μ
s
2.7 V VDD < 4.0 V 0.47 4.22
μ
s
Cycle time (minimum
instruction execution time)
T
CY
High-speed internal
oscillation clock
2.0 V V
DD < 2.7 V 0.95 4.22
μ
s
4.0 V VDD 5.5 V
2/f
sam+
0.1
Note 3
μ
s
TI000 input high-level width,
low-level width
Note 2
t
TIH,
t
TIL
2.0 V V
DD < 4.0 V
2/f
sam+
0.2
Note 3
μ
s
Interrupt input high-level
width, low-level width
t
INTH,
t
INTL
1
μ
s
RESET input low-level
width
t
RSL 2
μ
s
Notes 1. Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (VPOC) of the power-on
clear (POC) circuit is 2.1 V ±0.1 V.
2.
μ
PD78F920x only
3. Selection of f
sam = fXP, fXP/4, or fXP/256 is possible using bits 0 and 1 (PRM000, PRM001) of prescaler mode
register 00 (PRM00). Note that when selecting the TI000 valid edge as the count clock, f
sam = fXP.
CPU Clock Frequency, Peripheral Clock Frequency
Parameter Conditions CPU Clock (fCPU) Peripheral Clock (fXP)
4.0 to 5.5 V 125 kHz fCPU 10 MHz
3.0 to 4.0 V 125 kHz fCPU 6 MHz
2.7 to 3.0 V 125 kHz fCPU 5 MHz
500 kHz f
XP 10 MHz
Ceramic resonator
Note 1
,
crystal resonator
Note 1
,
external clock
2.0 to 2.7 V
Note 2
125 kHz f
CPU 2 MHz 500 kHz fXP 5 MHz
4.0 to 5.5 V 500 kHz (TYP.) fCPU 8 MHz (TYP.)
2.7 to 4.0 V 500 kHz (TYP.) fCPU 4 MHz (TYP.)
2 MHz (TYP.) f
XP 8 MHz (TYP.)
High-speed internal
oscillator
2.0 to 2.7 V
Note 2
500 kHz (TYP.) f
CPU 2 MHz (TYP.) 2 MHz (TYP.) fXP 4 MHz (TYP.)
Notes 1.
μ
PD78F920x only
2. Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (VPOC) of the power-on
clear (POC) circuit is 2.1 V ±0.1 V.
<R>
<R>