Datasheet
CHAPTER 19 ELECTRICAL SPECIFICATIONS
User’s Manual U18172EJ3V0UD
298
DC Characteristics (2/4)
(1)
μ
PD78F920x (TA = −40 to +85°C, VDD = 2.0 to 5.5 V
Note 1
, VSS = 0 V) (2/2)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
When A/D converter is stopped 6.1 12.2
fX = 10 MHz
V
DD = 5.0 V ±10%
Note 4
When A/D converter is operating 7.6 15.2
mA
When A/D converter is stopped 5.5 11.0
fX = 6 MHz
V
DD = 5.0 V ±10%
Note 4
When A/D converter is operating 14.0
mA
When A/D converter is stopped 3.0 6.0
IDD1
Note 3
Crystal/ceramic
oscillation,
external clock
input oscillation
operating
mode
Note 6
f
X = 5 MHz
V
DD = 3.0 V ±10%
Note 5
When A/D converter is operating 4.5 9.0
mA
When peripheral functions are stopped
1.7 3.8
fX = 10 MHz
V
DD = 5.0 V ±10%
Note 4
When peripheral functions are operating
6.7
mA
When peripheral functions are stopped
1.3 3.0
fX = 6 MHz
V
DD = 5.0 V ±10%
Note 4
When peripheral functions are operating
6.0
mA
When peripheral functions are stopped
0.48 1
IDD2
Crystal/ceramic
oscillation,
external clock
input HALT
mode
Note 6
f
X = 5 MHz
V
DD = 3.0 V ±10%
Note 5
When peripheral functions are operating
2.1
mA
When A/D converter is stopped 5.0 10.0IDD3
Note 3
High-speed
internal oscillation
operating
mode
Note 7
f
X = 8 MHz
V
DD = 5.0 V ±10%
Note 4
When A/D converter is operating 6.5 13.0
mA
When peripheral functions are stopped
1.4 3.2 IDD4
High-speed
internal oscillation
HALT mode
Note 7
f
X = 8 MHz
V
DD = 5.0 V ±10%
Note 4
When peripheral functions are operating
5.9
mA
When low-speed
internal oscillation
is stopped
3.5 20.0VDD = 5.0 V ±10%
When low-speed
internal oscillation
is operating
17.5 32.0
μ
A
When low-speed
internal oscillation
is stopped
3.5 15.5
Supply
current
Note 2
I
DD5 STOP mode
V
DD = 3.0 V ±10%
When low-speed
internal oscillation
is operating
11.0 26.0
μ
A
Notes 1. Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (VPOC) of the power-on
clear (POC) circuit is 2.1 V ±0.1 V.
2. Total current flowing through the internal power supply (V
DD). However, the current that flows through the
pull-up resistors of ports is not included.
3. I
DD1 and IDD3 include peripheral operation current.
4. When the processor clock control register (PCC) is set to 00H.
5. When the processor clock control register (PCC) is set to 02H.
6. When crystal/ceramic oscillation clock, external clock input is selected as the system clock source using
the option byte.
7. When high-speed internal oscillation clock is selected as the system clock source using the option byte.