Datasheet

CHAPTER 14 LOW-VOLTAGE DETECTOR
User’s Manual U18172EJ3V0UD
216
Figure 14-6. Example of Software Processing After Release of Reset (1/2)
• If supply voltage fluctuation is 50 ms or less in vicinity of LVI detection voltage
; The detection level is set with LVIS.
Yes
No
Setting LVI
Detection voltage or more
(LVIF = 0 ?)
Yes
LVIF = 0
Restarting the timaer H1
(TMHE1 = 0
TMHE1 = 1)
No
;
Clear low-voltage detection flag.
;
Clear timaer counter and timer starts.
LVI reset
; Check reset source
Note
Initialization of ports
Setting WDT
Reset
Initialization
processing <1>
Setting 8-bit timer H1
(50 ms is measured)
Source
: f RL (2.1 MHz (MAX.)) /2
12
,
51 ms when the compare value is 25
Timer starts
(TMHE1 = 1)
; f
XP = High-speed internal oscillation clock (8.4 MHz (MAX.)) /2
2
(default value)
Clears WDT
50 ms has passed?
(TMIFH1 = 1?)
Initialization
processing <2>
; Specify the division ratio of the system clock,
setting Timaer, setting A/D Converter, etc.
The low-voltage detector is operated (LVION = 1)
Note A flowchart is shown on the next page.