Datasheet

CHAPTER 14 LOW-VOLTAGE DETECTOR
User’s Manual U18172EJ3V0UD
209
14.3 Registers Controlling Low-Voltage Detector
The low-voltage detector is controlled by the following registers.
• Low-voltage detect register (LVIM)
• Low-voltage detection level select register (LVIS)
(1) Low-voltage detect register (LVIM)
This register sets low-voltage detection and the operation mode.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H
Note 1
.
Figure 14-2. Format of Low-Voltage Detect Register (LVIM)
<0>
LVIF
<1>
LVIMD
2
0
3
0
4
0
5
0
6
0
<7>
LVION
Symbol
LVIM
Address: FF50H After reset: 00H
Note 1
R/W
Note 2
LVION
Note 3
Enabling low-voltage detection operation
0 Disable operation
1 Enable operation
LVIMD Low-voltage detection operation mode selection
0 Generate interrupt signal when supply voltage (VDD) < detection voltage (VLVI)
1 Generate internal reset signal when supply voltage (VDD) < detection voltage (VLVI)
LVIF
Note 4
Low-voltage detection flag
0 Supply voltage (VDD) ≥ detection voltage (VLVI), or when operation is disabled
1 Supply voltage (VDD) < detection voltage (VLVI)
Notes 1. For a reset by LVI, the value of LVIM is not initialized.
2. Bit 0 is a read-only bit.
3. When LVION is set to 1, operation of the comparator in the LVI circuit is started. Use
software to instigate a wait of at least 0.2 ms from when LVION is set to 1 until the voltage is
confirmed at LVIF.
4. The value of LVIF is output as the interrupt request signal INTLVI when LVION = 1 and
LVIMD = 0.
Cautions 1. To stop LVI, follow either of the procedures below.
• When using 8-bit manipulation instruction: Write 00H to LVIM.
• When using 1-bit memory manipulation instruction: Clear LVION to 0.
2. Be sure to set bits 2 to 6 to 0.