Datasheet

CHAPTER 10 INTERRUPT FUNCTIONS
User’s Manual U18172EJ3V0UD
180
(2) Interrupt mask flag register 0 (MK0)
The interrupt mask flag is used to enable and disable the corresponding maskable interrupts.
MK0 is set with a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets MK0 to FFH.
Figure 10-3. Format of Interrupt Mask Flag Register 0 (MK0)
Address: FFE4H After reset: FFH R/W
Symbol <7> <6> <5> <4> <3> <2> <1> 0
MK0 ADMK
Note
TMMK010
Note
TMMK000
Note
TMMKH1 PMK1 PMK0 LVIMK 1
××MK× Interrupt servicing control
0 Enables interrupt servicing.
1 Disables interrupt servicing.
Note μ PD78F920x only
Caution Because P21 and P32 have an alternate function as external interrupt inputs, when the
output level is changed by specifying the output mode of the port function, an interrupt
request flag is set. Therefore, the interrupt mask flag should be set to 1 before using the
output mode.
(3) External interrupt mode register 0 (INTM0)
This register is used to set the valid edge of INTP0 and INTP1.
INTM0 is set with an 8-bit memory manipulation instruction.
Reset signal generation clears INTM0 to 00H.
Figure 10-4. Format of External Interrupt Mode Register 0 (INTM0)
Address: FFECH After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
INTM0 0 0 ES11 ES10 ES01 ES00 0 0
ES11 ES10 INTP1 valid edge selection
0 0 Falling edge
0 1 Rising edge
1 0 Setting prohibited
1 1 Both rising and falling edges
ES01 ES00 INTP0 valid edge selection
0 0 Falling edge
0 1 Rising edge
1 0 Setting prohibited
1 1 Both rising and falling edges
<R>