Datasheet
CHAPTER 9 A/D CONVERTER (
μ
PD78F920x ONLY)
User’s Manual U18172EJ3V0UD
172
(5) Full-scale error
This shows the difference between the actual measurement value of the analog input voltage and the theoretical
value (Full-scale − 3/2LSB) when the digital output changes from 1......110 to 1......111.
(6) Integral linearity error
This shows the degree to which the conversion characteristics deviate from the ideal linear relationship. It
expresses the maximum value of the difference between the actual measurement value and the ideal straight line
when the zero-scale error and full-scale error are 0.
(7) Differential linearity error
While the ideal width of code output is 1LSB, this indicates the difference between the actual measurement value
and the ideal value.
Figure 9-15. Zero-Scale Error Figure 9-16. Full-Scale Error
111
011
010
001
Zero-scale error
Ideal line
000
012 3 V
DD
Digital output (Lower 3 bits)
Analog input (LSB)
111
110
101
000
0
V
DD
−3
Full-scale error
Ideal line
Analog input (LSB)
Digital output (Lower 3 bits)
V
DD
−2V
DD
−1
V
DD
Figure 9-17. Integral Linearity Error Figure 9-18. Differential Linearity Error
0
VDD
Digital output
Analog input
Integral linearity
error
Ideal line
1
……
1
0
……
0
0
V
DD
Digital output
Analog input
Differential
linearity error
1
……
1
0
……
0
Ideal 1LSB width
(8) Conversion time
This expresses the time from the start of sampling to when the digital output is obtained.
The sampling time is included in the conversion time in the characteristics table.
(9) Sampling time
This is the time the analog switch is turned on for the analog voltage to be sampled by the sample & hold circuit.
Sampling
time
Conversion time