Datasheet

CHAPTER 8 WATCHDOG TIMER
User’s Manual U18172EJ3V0UD
155
8.4.3 Watchdog timer operation in STOP mode (when “low-speed internal oscillator can be stopped by
software” is selected by option byte)
The watchdog timer stops counting during STOP instruction execution regardless of whether the system clock or
low-speed internal oscillation clock is being used.
(1) When the watchdog timer operation clock is the system clock (f
X) when the STOP instruction is executed
When STOP instruction is executed, operation of the watchdog timer is stopped. After STOP mode is released,
operation stops for 34
μ s (TYP.) (after waiting for the oscillation stabilization time set by the oscillation
stabilization time select register (OSTS) after operation stops in the case of crystal/ceramic oscillation) and then
counting is started again using the operation clock before the operation was stopped. At this time, the counter is
not cleared to 0 but holds its value.
Figure 8-6. Operation in STOP Mode (WDT Operation Clock: Clock to Peripheral Hardware)
<1> CPU clock: Crystal/ceramic oscillation clock (
μ PD78F920x Only)
Operation stopped Operating
Oscillation stabilization time
Normal operation
STOP
Oscillation stabilization time
(set by OSTS register)
Oscillation stopped
Watchdog timer
Operating
f
CPU
CPU operation
Normal
operation
Operation
stopped
Note
<2> CPU clock: High-speed internal oscillation clock or external clock input
Operation stopped Operating
Normal operation
Oscillation stopped
Watchdog timer
f
CPU
CPU operation
STOP
Operating
Normal
operation
Operation
stopped
Note
Note The operation stop time is 17
μ s (MIN.), 34 μ s (TYP.), and 67 μ s (MAX.).
<R>