Datasheet

CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00 ( μ PD78F920x ONLY)
User’s Manual U18172EJ3V0UD
112
Figure 6-25. Timing of Pulse Width Measurement Operation by Free-Running Counter
and Two Capture Registers (with Rising Edge Specified)
t
0000H 0000H FFFFH 0001H D0
D0 D2
D1 D3
D2 D3D1
D0 + 1 D2 + 1D1 + 1
INTTM010
CR000 capture value
Count clock
TM00 count value
TI000 pin input
CR010 capture value
(D1 − D0) × t (D3 − D2) × t(D2 − D1) × t
Note
Note The carry flag is set to 1. Ignore this setting.
(4) Pulse width measurement by means of restart
Specify both the rising and falling edges as the valid edges of the TI000 pin, by using bits 4 and 5 (ES000 and
ES010) of PRM00.
When input of a valid edge to the TI000 pin is detected, the count value of 16-bit timer/counter 00 (TM00) is
taken into 16-bit timer capture/compare register 010 (CR010), and then the pulse width of the signal input to
the TI000 pin is measured by clearing TM00 and restarting the count.
The edge specification can be selected from two types, rising or falling edges, by bits 4 and 5 (ES000 and
ES010) of prescaler mode register 00 (PRM00)
Sampling is performed at the interval selected by prescaler mode register 00 (PRM00) and a capture operation
is only performed when a valid level of the TI000 pin is detected twice, thus eliminating noise with a short
pulse width.
Caution The measurable pulse width in this operation example is up to 1 cycle of the timer counter.
Figure 6-26. Control Register Settings for Pulse Width Measurement by Means of Restart
(with Rising Edge Specified) (1/2)
(a) Capture/compare control register 00 (CRC00)
7
0
6
0
5
0
4
0
3
0
CRC002
1
CRC001
1
CRC000
1CRC00
CR000 used as capture register
Captures to CR000 at inverse edge to valid edge of TI000
Note
.
CR010 used as capture register
Note If the valid edge of TI000 is specified to be both the rising and falling edges, 16-bit timer capture/compare
register 000 (CR000) cannot perform the capture operation.