Datasheet
78K0/Ix2 CHAPTER 3 CPU ARCHITECTURE
R01UH0010EJ0500 Rev.5.00 85
Feb 28, 2012
3.3 Instruction Address Addressing
An instruction address is determined by contents of the program counter (PC) and is normally incremented (+1 for each
byte) automatically according to the number of bytes of an instruction to be fetched each time another instruction is executed.
When a branch instruction is executed, the branch destination information is set to PC and branched by the following
addressing (for details of instructions, refer to the 78K/0 Series Instructions User’s Manual (U12326E)).
3.3.1 Relative addressing
[Func
tion]
The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to the start
address of the following instruction is transferred to the program counter (PC) and branched. The displacement value
is treated as signed two’s complement data (128 to +127) and bit 7 becomes a sign bit.
In other words, relative addressing consists of relative branching from the start address of the following instruction to
the 128 to +127 range.
This function is carried out when the BR $addr16 instruction or a conditional branch instruction is executed.
[Illustration]
15 0
PC
+
15 0
876
S
15 0
PC
α
jdisp8
When S = 0, all bits of are 0.
When S = 1, all bits of are 1.
PC indicates the start address
of the instruction after the BR instruction.
...
α
α