Datasheet

78K0/Ix2 APPENDIX C REVISION HISTORY
R01UH0010EJ0500 Rev.5.00 736
Feb 28, 2012
C.2 Revision History of Preceding Editions
Here is the revision history of the preceding editions. Chapter indicates the chapter of each edition.
(1/7)
Edition Description Chapter
Modification of related documents
INTRODUCTION
Modification of Figure 6-8 Format of 16-Bit Timer X0 Operation Control Register 1
(TX0CTL1)
Modification of Figure 6-9 Format of 16-Bit Timer X1 Operation Control Register 1
(TX1CTL1)
Modification of Table 6-2 Register Setting Bits Controlling Operation Mode and 16-
bit Timers X0 and X1 (1/2)
Modification of Figure 6-18 Example of Register Settings for PWM Output Operation
(Single Mode)
Modification of Figure 6-20 Example of Register Settings for PWM Output Operation
(Dual Mode)
Modification of Figure 6-22 Example of Register Settings for PWM Output Operation
(TMX0 and TMX1 synchronous start/clear mode, PWM output: TOX00, TOX01,
TOX10, and TOX11 pins)
Modification of Figure 6-24 Example of Register Settings for PWM Output Operation
(TMX0 and TMX1 Synchronous Start Mode, PWM Output: TOX00, TOX01, TOX10,
and TOX11 Pins)
Modification of 6.4 (5) PWM output operation (PWM output from TOX0n when TOH1
output is at high level)
Modification of 6.4 (6) PWM output operation (PWM output from TOX0n when
TOH1 output is at low level)
Addition of 6.4 (7) PWM output operation (PWM output from TOX1n when TOH1
output is at high level)
Addition of 6.4 (8) PWM output operation (PWM output from TOX00, TOX01, TOX10,
and TOX11 when TOH1 output is at high level)
CHAPTER 6 16-BIT
TIMERS X0 AND X1
Deletion of Caution 2 in 11.4.1 Basic operations of A/D converter (software trigger
mode) in old edition
Deletion of Caution 2 in 11.4.2 Basic operations of A/D converter (timer trigger
mode) in old edition
11.4.5 A/D converter operation mode
 Deletion of Caution 2 in  Software trigger mode in old edition
 Deletion of Caution 2 in  Timer trigger mode in old edition
CHAPTER 11 A/D
CONVERTER
Modification of and addition of Remark to Figure 12-2 Format of Operational Amplifier
0 Control Register (AMP0M) (Products with Operational Amplifier Only)
CHAPTER 12
OPERATIONAL
AMPLIFIERS
Modification of 25.4.2 TOOLD0 and TOOLD1 pins
CHAPTER 25 FLASH
MEMORY
Modification of Note 4 in Figure A-1 Development Tool Configuration (1/2)
Addition of Note 4 to and modification of Note 6 in Figure A-1 Development Tool
Configuration (2/2)
Modification of description of System simulator in A.5 Debugging Tools (Software)
APPENDIX A
DEVELOPMENT
TOOLS
2nd Edition
Addition of chapter
APPENDIX B
REVISION HISTORY