Datasheet

78K0/Ix2 CHAPTER 3 CPU ARCHITECTURE
R01UH0010EJ0500 Rev.5.00 59
Feb 28, 2012
Table 3-6. Special Function Register List : 78K0/IY2 (2/6)
Bit No. Number of Bits
Manipulated
Simultaneously
Address Symbol
7 6 5 4 3 2 1 0
R/W
1 8 16
After
Reset
Reference
page
FF24H to
FF27H
FF28H ADM0
<ADCS>
0 FR2 FR1 FR0 LV1 LV0
<ADCE>
R/W 00H 373
FF29H
FF2AH
FF2BH
FPCTL 0 0 0 0 0 0 0
<FLMD
PUP>
R/W 00H 670
FF2CH
FF2DH RSTMASK 0 0 RSTM 0 0 0 0 0 R/W 00H 155
FF2EH ADPC0 0 0
ADPCS
5
ADPCS
4
ADPCS
3
0
ADPCS
1
ADPCS
0
R/W 00H
155, 382,
408, 425
FF2FH to
FF32H
FF33H PU3 0 0 0 PU34 PU33 PU32 PU31 0 R/W 00H 152
FF34H to
FF38H
FF39H MUXSEL
<INTP0
SEL1>
<INTP0
SEL0>
<TM00
SEL1>
<TM00
SEL0>
0
<TM5
SEL0>
0
<TMH
SEL0>
R/W 00H
157, 270,
332, 344,
592
FF3AH
FF3BH
FF3CH PU12 0 0 PU125 0 0 0 0 0 R/W 20H 152
FF3DH RMC R/W 00H 649
FF3EH to
FF40H
FF41H CR51 R/W 00H 330
FF42H
FF43H TMC51
<TCE51>
0 0 0 0 0 0 0 R/W 00H 332
FF44H to
FF47H
FF48H EGPCTL0 EGP7 EGP6 0 EGP4 EGP3 EGP2 0 EGP0 R/W 00H 593
FF49H EGNCTL0 EGN7 EGN6 0 EGN4 EGN3 EGN2 0 EGN0 R/W 00H 593
FF4AH EGPCTL1 0 0 0 0 0 0 0 EGP8 R/W 00H 593
FF4BH EGNCTL1 0 0 0 0 0 0 0 EGN8 R/W 00H 593
FF4CH to
FF5FH
Remark For a bit name enclosed in angle brackets (<>), the bit name is defined as a reserved word in the RA78K0, and is
defined as an sfr variable using the #pragma sfr directive in the CC78K0.