Datasheet

Index-2
3.3.4 Register addressing ........................................................................................................................ 88
3.4 Operand Address Addressing .................................................................................................... 88
3.4.1 Implied addressing .......................................................................................................................... 88
3.4.2 Register addressing ........................................................................................................................ 89
3.4.3 Direct addressing ............................................................................................................................ 90
3.4.4 Short direct addressing ................................................................................................................... 91
3.4.5 Special function register (SFR) addressing ..................................................................................... 92
3.4.6 Register indirect addressing............................................................................................................ 93
3.4.7 Based addressing............................................................................................................................ 94
3.4.8 Based indexed addressing .............................................................................................................. 95
3.4.9 Stack addressing............................................................................................................................. 96
CHAPTER 4 PORT FUNCTIONS ........................................................................................................... 97
4.1 Port Functions .............................................................................................................................. 97
4.2 Port Configuration...................................................................................................................... 102
4.2.1 Port 0............................................................................................................................................. 103
4.2.2 Port 2............................................................................................................................................. 107
4.2.3 Port 3............................................................................................................................................. 116
4.2.4 Port 6............................................................................................................................................. 126
4.2.5 Port 7............................................................................................................................................. 129
4.2.6 Port 12........................................................................................................................................... 131
4.3 Registers Controlling Port Function ........................................................................................ 134
4.4 Port Function Operations .......................................................................................................... 145
4.4.1 Writing to I/O port .......................................................................................................................... 145
4.4.2 Reading from I/O port.................................................................................................................... 145
4.4.3 Operations on I/O port................................................................................................................... 145
4.5 Settings of Port Mode Register and Output Latch When Using Alternate Function........... 146
4.6 Cautions on 1-Bit Manipulation Instruction for Port Register n (Pn).................................... 154
CHAPTER 5 CLOCK GENERATOR .................................................................................................... 155
5.1 Functions of Clock Generator................................................................................................... 155
5.2 Configuration of Clock Generator ............................................................................................ 156
5.3 Registers Controlling Clock Generator.................................................................................... 158
5.4 System Clock Oscillator ............................................................................................................ 166
5.4.1 X1 oscillator................................................................................................................................... 166
5.4.2 Internal high-speed oscillator ........................................................................................................ 167
5.4.3 Internal low-speed oscillator.......................................................................................................... 168
5.4.4 Prescaler ....................................................................................................................................... 168
5.4.5 PLL (Phase Locked Loop)............................................................................................................. 168
5.5 Clock Generator Operation ....................................................................................................... 170
5.6 Controlling Clock........................................................................................................................ 173
5.6.1 Example of controlling high-speed system clock........................................................................... 173
5.6.2 Example of controlling internal high-speed oscillation clock.......................................................... 176
5.6.3 Example of controlling internal low-speed oscillation clock ........................................................... 179
5.6.4 CPU clock status transition diagram.............................................................................................. 180
5.6.5 Condition before changing CPU clock and processing after changing CPU clock ........................ 183
5.6.6 Time required for switchover of CPU clock and main system clock .............................................. 184
5.6.7 Conditions before clock oscillation is stopped ............................................................................... 185
5.6.8 Peripheral hardware and source clocks ........................................................................................ 185