Datasheet

78K0/Ix2 CHAPTER 22 LOW-VOLTAGE DETECTOR
R01UH0010EJ0500 Rev.5.00 643
Feb 28, 2012
Figure 22-8. Example of Software Processing After Reset Release (2/2)
 Checking reset source
Yes
No
Check reset source
Power-on-clear/external
reset generated
Reset processing by
watchdog timer
Reset processing by
low-voltage detector
Yes
WDTRF of RESF
register = 1?
LVIRF of RESF
register = 1?
No
Operation example 2: When used as interrupt
Interrupt requests may be generated frequently.
Take the following action.
<Action>
Confirm that “supply voltage (V
DD)  LVI detection voltage (VLVI)” when detecting the falling edge of VDD, or
“supply voltage (V
DD) < LVI detection voltage (VLVI)” when detecting the rising edge of VDD, in the servicing routine
of the LVI interrupt by using bit 0 (LVIF) of the low-voltage detection register (LVIM). Clear bit 1 (LVIIF) of interrupt
request flag register 0L (IF0L) to 0.
For a system with a long supply voltage fluctuation period near the LVI detection voltage, take the above action
after waiting for the supply voltage fluctuation time.