Datasheet

78K0/Ix2 CHAPTER 22 LOW-VOLTAGE DETECTOR
R01UH0010EJ0500 Rev.5.00 639
Feb 28, 2012
Figure 22-6. Timing of Low-Voltage Detector Interrupt Signal Generation (LVISTART = 0)
INTLVI
<1>
<2>
<6>
<7>
<4>
L
Internal reset signal
Supply voltage (V
DD )
LVIMK flag
(set by software)
LVION flag
(set by software)
LVIMD flag
(set by software)
LVIF flag
LVIIF flag
Cleared by software
<8> Cleared by software
<5> Wait time
Note 3
Note 2
Note 2
Note 2
Note 1
Note 3
Time
<3>
V LVI
V POR = 1.61 V (TYP.)
V
PDR = 1.59 V (TYP.)
Notes 1. The LVIMK flag is set to “1” by reset signal generation.
2. The interrupt request signal (INTLVI) is generated and the LVIF and LVIIF flags may be set (1).
3. If LVI operation is disabled (clears LVION) when the supply voltage (V
DD) is less than or equal to the
detection voltage (V
LVI), an interrupt request signal (INTLVI) is generated and LVIIF may be set to 1.
Remarks 1. <1> to <8> in Figure 22-6 above correspond to <1> to <8> in the description of “When starting
operation” in 22.4.2 (1) When LVI default start function stopped is set (LVISTART = 0).
2. V
POR: POC power supply rise detection voltage
V
PDR: POC power supply fall detection voltage