Datasheet

78K0/Ix2 CHAPTER 22 LOW-VOLTAGE DETECTOR
R01UH0010EJ0500 Rev.5.00 635
Feb 28, 2012
22.4.1 When used as reset
(1
) When LVI default start function stopped is set (LVISTART = 0)
 When starting operation
<1> Mask the LVI interrupt (LVIMK = 1).
<2> Set the LVI detection voltage using bits 3 to 0 (LVIS3 to LVIS0) of the low-voltage detection level
selection register (LVIS).
<3> Set bit 7 (LVION) of LVIM to 1 (enables LVI operation).
<4> Use software to wait for an operation stabilization time (10
 s (MAX.)).
<5> Wait until it is checked that (supply voltage (V
DD)  LVI detection voltage (VLVI)) by bit 0 (LVIF) of LVIM.
<6> Set bit 1 (LVIMD) of LVIM to 1 (generates reset when the level is detected).
Figure 22-4 shows the timing of the internal reset signal generated by the low-voltage detector. The numbers in
this timing chart correspond to <1> to <6> above.
Cautions 1. Be sure to execute <1>. When LVIMK = 0, an interrupt may occur immediately after the
processing in <3>.
2. If supply voltage (V
DD)  LVI detection voltage (VLVI) when LVIMD is set to 1, an internal
reset signal is not generated.
 When stopping operation
Either of the following procedures must be executed.
 When using 8-bit memory manipulation instruction:
Write 00H to LVIM.
 When using 1-bit memory manipulation instruction:
Clear LVIMD to 0 and then LVION to 0.