Datasheet

78K0/Ix2 CHAPTER 22 LOW-VOLTAGE DETECTOR
R01UH0010EJ0500 Rev.5.00 634
Feb 28, 2012
22.4 Operation of Low-Voltage Detector
The low-voltage detector can be used in the following two modes.
(1) Used as reset (LVIMD = 1)
Compares the supply voltage (V
DD) and LVI detection voltage (VLVI), generates an internal reset signal when VDD <
V
LVI, and releases internal reset when VDD  VLVI.
Remark The low-voltage detector (LVI) can be set to ON by an option byte by default. If it is set to ON to raise
the power supply from the POC detection voltage (V
POR = 1.61 V (TYP.)) or lower, the internal reset
signal is generated when the supply voltage (VDD) < detection voltage (VLVI = 1.91 V 0.1 V).
(2) Used as interrupt (LVIMD = 0)
Compares the supply voltage (V
DD) and LVI detection voltage (VLVI). When VDD drops lower than VLVI (VDD < VLVI) or
when V
DD becomes VLVI or higher (VDD  VLVI), generates an interrupt signal (INTLVI).
While the low-voltage detector is operating, whether the supply voltage or the input voltage from an external input pin is
more than or less than the detection level can be checked by reading the low-voltage detection flag (LVIF: bit 0 of LVIM).
Remark LVIMD: Bit 1 of low-voltage detection register (LVIM)