Datasheet

78K0/Ix2 CHAPTER 21 POWER-ON-CLEAR CIRCUIT
R01UH0010EJ0500 Rev.5.00 624
Feb 28, 2012
CHAPTER 21 POWER-ON-CLEAR CIRCUIT
21.1 Functions of Power-on-Clear Circuit
The power-on-clear circuit (POC) is mounted onto all 78K0/Ix2 microcontroller products.
The power-on-clear circuit has the following functions.
 Generates internal reset signal at power on.
 The reset signal is released when the supply voltage (V
DD) exceeds POC detection voltage (VPOR = 1.61 V 0.09 V).
Caution If the LVI default function enabled is set by using an option byte, the reset signal is not released
until the supply voltage (VDD) exceeds 1.91 V 0.1 V.
 Compares supply voltage (VDD) and POC detection voltage (VPDR = 1.59 V 0.09 V), generates internal reset signal
when V
DD < VPDR.
Cautions 1. If an internal reset signal is generated in the POC circuit, the reset control flag register (RESF)
is cleared to 00H.
2. The operating voltage range is 2.7 to 5.5 V. If it takes 5.4 ms or longer until the voltage
stabilizes at 2.7 V or more after the power is turned on, execute the initial setting processing
(see the software processing example described in 21.4 Power-On-Clear Circuit Cautions and
22.5 Low-Voltage Detector Cautions) after the voltage stabilizes at 2.7 V or more.
Remark The 78K0/Ix2 microcontrollers incorporate multiple hardware functions that generate an internal reset
signal. A flag that indicates the reset source is located in the reset control flag register (RESF) for when
an internal reset signal is generated by the watchdog timer (WDT) and low-voltage-detector (LVI). RESF
is not cleared to 00H and the flag is set to 1 when an internal reset signal is generated by WDT or LVI.
For details of RESF, refer to CHAPTER 20 RESET FUNCTION.