Datasheet
78K0/Ix2 CHAPTER 20 RESET FUNCTION
R01UH0010EJ0500 Rev.5.00 623
Feb 28, 2012
20.1 Register for Confirming Reset Source
Many internal reset generation sources exist in the 78K0/Ix2 microcontrollers. The reset control flag register (RESF is
used to store which source has generated the reset request.
RESF can be read by an 8-bit memory manipulation instruction.
RESET input, reset by power-on-clear (POC) circuit, and reading RESF set RESF to 00H.
Figure 20-5. Format of Reset Control Flag Register (RESF)
Address: FFACH After reset: 00H
Note
R
Symbol 7 6 5 4 3 2 1 0
RESF 0 0 0 WDTRF 0 0 0 LVIRF
WDTRF Internal reset request by watchdog timer (WDT)
0 Internal reset request is not generated, or RESF is cleared.
1 Internal reset request is generated.
LVIRF Internal reset request by low-voltage detector (LVI)
0 Internal reset request is not generated, or RESF is cleared.
1 Internal reset request is generated.
Note The value after reset varies depending on the reset source.
Caution Do not read data by a 1-bit memory manipulation instruction.
The status of RESF when a reset request is generated is shown in Table 20-3.
Table 20-3. RESF Status When Reset Request Is Generated
Reset Source
Flag
RESET Input Reset by POC Reset by WDT
Reset by LVI
(Except reset by
LVI default start
function)
Reset by LVI
default start
function
WDTRF Set (1) Held
LVIRF
Cleared (0) Cleared (0)
Held Set (1)
Cleared (0)