Datasheet

78K0/Ix2 CHAPTER 19 STANDBY FUNCTION
R01UH0010EJ0500 Rev.5.00 609
Feb 28, 2012
Cautions 1. To use the peripheral hardware that stops operation in the STOP mode, and the peripheral hardware
for which the clock that stops oscillating in the STOP mode after the STOP mode is released, restart
the peripheral hardware.
2. When transitioning to the STOP mode, it is possible to achieve low power consumption by setting
RMC = 56H.
3. Even if “internal low-speed oscillator can be stopped by software” is selected by the option byte,
the internal low-speed oscillation clock continues in the STOP mode in the status before the STOP
mode is set. To stop the internal low-speed oscillator’s oscillation in the STOP mode, stop it by
software and then execute the STOP instruction.
4. To shorten oscillation stabilization time after the STOP mode is released when the CPU operates
with the high-speed system clock (X1 oscillation), switch the CPU clock to the internal high-speed
oscillation clock before the execution of the STOP instruction using the following procedure.
<1> Set RSTOP to 0 (starting oscillation of the internal high-speed oscillator)  <2> Set MCM0 to 0
(switching the CPU from X1 oscillation to internal high-speed oscillation)  <3> Check that MCS is 0
(checking the CPU clock)  <4> Check that RSTS is 1 (checking internal high-speed oscillation
operation)  <5> Execute the STOP instruction
Before changing the CPU clock from the internal high-speed oscillation clock to the high-speed
system clock (X1 oscillation) after the STOP mode is released, check the oscillation stabilization
time with the oscillation stabilization time counter status register (OSTC).
5. Execute the STOP instruction after having confirmed that the internal high-speed oscillator is
operating stably (RSTS = 1).
6. Be sure to stop the PLL operation (PLLON = 0) before executing the STOP instruction.