Datasheet

78K0/Ix2 CHAPTER 19 STANDBY FUNCTION
R01UH0010EJ0500 Rev.5.00 608
Feb 28, 2012
Table 19-3. Operating Statuses in STOP Mode
When STOP Instruction Is Executed While CPU Is Operating on Main System Clock STOP Mode Setting
Item
When CPU Is Operating on
Internal High-Speed
Oscillation Clock (f
IH)
When CPU Is Operating on
X1 Clock (f
X)
When CPU Is Operating on
External Main System Clock
(f
EXCLK)
System clock Clock supply to the CPU is stopped
fIH
fX
Stopped
Main system clock
fEXCLK Input invalid
fIL Status before STOP mode was set is retained
PLL Not operating (executing the STOP instruction during PLL operation is prohibited)
CPU
Flash memory
Operation stopped
RAM
Port (latch)
Status before STOP mode was set is retained
X0 16-bit timer
X1
16-bit timer/event counter 00
Operation stopped
8-bit timer/event counter 51 Operable only when TI51 is selected as the count clock
8-bit timer H1 Operable only when fIL, fIL/2
6
, fIL/2
15
is selected as the count clock
Watchdog timer Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
A/D converter Operation stopped
Operational amplifier (AMP,
PGA)
Operable
Comparators 0 to 2 Comparator n is operable when both CnDFS0 = 0 and CnDFS1 = 0 are set. (n = 0 to 2)
UART6/DALI Operation stopped
CSI11 Operable only when external clock is selected as the serial clock
Serial interface
IICA Wakeup by address match operable
Multiplier Operation stopped
External interrupt
Power-on-clear function
Low-voltage detection function
Operable
Remarks 1. f
IH: Internal high-speed oscillation clock, fX: X1 clock
f
EXCLK: External main system clock, fIL: Internal low-speed oscillation clock
2. The functions mounted depend on the product. Refer to 1.4 Block Diagram and 1.5 Outline of
Functions.