Datasheet

78K0/Ix2 CHAPTER 19 STANDBY FUNCTION
R01UH0010EJ0500 Rev.5.00 607
Feb 28, 2012
Table 19-2. Operation in Response to Interrupt Request in HALT Mode
Release Source MK PR IE ISP Operation
0 0 0

Next address
instruction execution
0 0 1

Interrupt servicing
execution
0 1 0 1
0 1

0
Next address
instruction execution
0 1 1 1
Interrupt servicing
execution
Maskable interrupt
request
1
  
HALT mode held
Reset
   
Reset processing
: don’t care
19.2.2 STOP mode
(1)
STOP mode setting and operating statuses
The STOP mode is set by executing the STOP instruction, and it can be set only when the CPU clock before the
setting was the high-speed system clock or internal high-speed oscillation clock.
Caution Because the interrupt request signal is used to clear the standby mode, if there is an interrupt
source with the interrupt request flag set and the interrupt mask flag reset, the standby mode is
immediately cleared if set. Thus, the STOP mode is reset to the HALT mode immediately after
execution of the STOP instruction and the system returns to the operating mode as soon as the
wait time set using the oscillation stabilization time select register (OSTS) has elapsed.
The operating statuses in the STOP mode are shown below.