Datasheet
78K0/Ix2 CHAPTER 19 STANDBY FUNCTION
R01UH0010EJ0500 Rev.5.00 604
Feb 28, 2012
Table 19-1. Operating Statuses in HALT Mode
When HALT Instruction Is Executed While CPU Is Operating on Main System Clock HALT Mode Setting
Item
When CPU Is Operating on
Internal High-Speed
Oscillation Clock (f
IH)
When CPU Is Operating on
X1 Clock (f
X)
When CPU Is Operating on
External Main System Clock
(f
EXCLK)
System clock Clock supply to the CPU is stopped
fIH Operation continues (cannot
be stopped)
Status before HALT mode was set is retained
fX Status before HALT mode
was set is retained
Operation continues (cannot
be stopped)
Status before HALT mode
was set is retained
Main system clock
fEXCLK Operates or stops by external clock input Operation continues (cannot
be stopped)
fIL
PLL
Status before HALT mode was set is retained
CPU
Flash memory
Operation stopped
RAM
Port (latch)
Status before HALT mode was set is retained
X0 16-bit timer
X1
16-bit timer/event counter 00
8-bit timer/event counter 51
8-bit timer H1
Operable
Watchdog timer Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
A/D converter
Operational amplifier (AMP,
PGA)
Comparators 0 to 2
UART6/DALI
CSI11
Serial interface
IICA
Operable
Multiplier Operation stopped
External interrupt
Power-on-clear function
Low-voltage detection function
Operable
Remarks 1. f
IH: Internal high-speed oscillation clock, fX: X1 clock
f
EXCLK: External main system clock, fIL: Internal low-speed oscillation clock
2. The functions mounted depend on the product. Refer to 1.4 Block Diagram and 1.5 Outline of
Functions.