Datasheet

78K0/Ix2 CHAPTER 19 STANDBY FUNCTION

R01UH0010EJ0500 Rev.5.00 601

Feb 28, 2012

19.1.2 Registers controlling standby function

The standby function is controlled by the following two registers.

 Oscillation stabilization time counter status register (OSTC)

 Oscillation stabilization time select register (OSTS)

Remark For the registers that start, stop, or select the clock, refer to CHAPTER 5 CLOCK GENERATOR.

(1) Oscillation stabilization time counter status register (OSTC)

This is the register that indicates the count status of the X1 clock oscillation stabilization time counter. When X1 clock

oscillation starts with the internal high-speed oscillation clock used as the CPU clock, the X1 clock oscillation

stabilization time can be checked.

OSTC can be read by a 1-bit or 8-bit memory manipulation instruction.

When reset is released (reset by RESET input, POC, LVI, and WDT), the STOP instruction and MSTOP (bit 7 of MOC