Datasheet

Index-1
CONTENTS
CHAPTER 1 OUTLINE............................................................................................................................... 1
1.1 Features........................................................................................................................................... 1
1.2 Ordering Information...................................................................................................................... 3
1.3 Pin Configuration (Top View) ........................................................................................................ 5
1.3.1 78K0/IY2 ........................................................................................................................................... 5
1.3.2 78K0/IA2 ........................................................................................................................................... 6
1.3.3 78K0/IB2 ........................................................................................................................................... 7
1.4 Block Diagram .............................................................................................................................. 10
1.4.1 78K0/IY2 ......................................................................................................................................... 10
1.4.2 78K0/IA2 ......................................................................................................................................... 11
1.4.3 78K0/IB2 ......................................................................................................................................... 12
1.5 Outline of Functions..................................................................................................................... 14
CHAPTER 2 PIN FUNCTIONS ............................................................................................................... 16
2.1 Pin Function List .......................................................................................................................... 16
2.1.1 78K0/IY2 ......................................................................................................................................... 17
2.1.2 78K0/IA2 ......................................................................................................................................... 19
2.1.3 78K0/IB2 (30 pins)........................................................................................................................... 22
2.1.4 78K0/IB2 (32 pins)........................................................................................................................... 25
2.2 Description of Pin Functions ...................................................................................................... 28
2.2.1 P00 to P02 (port 0) .......................................................................................................................... 28
2.2.2 P20 to P27 (port 2) .......................................................................................................................... 29
2.2.3 P30 to P37 (port 3) .......................................................................................................................... 30
2.2.4 P60 and P61 (port 6) ....................................................................................................................... 31
2.2.5 P70 (port 7) ..................................................................................................................................... 32
2.2.6 P121, P122, and P125 (port 12)...................................................................................................... 32
2.2.7 AVREF, AVSS, VDD, VSS .............................................................................................................. 33
2.2.8 IC0................................................................................................................................................... 34
2.2.9 REGC.............................................................................................................................................. 34
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins ........................................... 35
CHAPTER 3 CPU ARCHITECTURE ...................................................................................................... 42
3.1 Memory Space .............................................................................................................................. 42
3.1.1 Internal program memory space ..................................................................................................... 46
3.1.2 Internal data memory space............................................................................................................ 48
3.1.3 Special function register (SFR) area ............................................................................................... 48
3.1.4 Data memory addressing ................................................................................................................ 49
3.2 Processor Registers..................................................................................................................... 52
3.2.1 Control registers.............................................................................................................................. 52
3.2.2 General-purpose registers............................................................................................................... 56
3.2.3 Special function registers (SFRs).................................................................................................... 57
3.3 Instruction Address Addressing................................................................................................. 85
3.3.1 Relative addressing......................................................................................................................... 85
3.3.2 Immediate addressing ..................................................................................................................... 86
3.3.3 Table indirect addressing ................................................................................................................ 87