Datasheet
78K0/Ix2 CHAPTER 16 SERIAL INTERFACE CSI11
R01UH0010EJ0500 Rev.5.00 553
Feb 28, 2012
Figure 16-3. Format of Serial Clock Selection Register 11 (CSIC11)
Address: FF89H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
CSIC11 0 0 0 CKP11 DAP11 CKS112 CKS111 CKS110
CKP11 DAP11 Specification of data transmission/reception timing Type
0 0
D7 D6 D5 D4 D3 D2 D1 D0
SCK11
SO11
SI11 input timing
1
0 1
D7 D6 D5 D4 D3 D2 D1 D0
SCK11
SO11
SI11 input timing
2
1 0
D7 D6 D5 D4 D3 D2 D1 D0
SCK11
SO11
SI11 input timing
3
1 1
D7 D6 D5 D4 D3 D2 D1 D0
SCK11
SO11
SI11 input timing
4
CSI11 serial clock selection CKS112 CKS111 CKS110
f
PRS =
2 MHz
fPRS =
5 MHz
fPRS =
10 MHz
fPRS =
20 MHz
(when
using PLL)
Mode
0 0 0 fPRS/2 1 MHz 2.5 MHz
5 MHz 10 MHz
0 0 1 fPRS/2
2
500 kHz 1.25 MHz 2.5 MHz
5 MHz
0 1 0 fPRS/2
3
250 kHz 625 kHz 1.25 MHz 2.5 MHz
0 1 1 fPRS/2
4
125 kHz 312.5 kHz 625 kHz 1.25 MHz
1 0 0 fPRS/2
5
62.5 kHz 156.25 kHz 312.5 kHz 625 kHz
1 0 1 fPRS/2
6
31.25 kHz 78.13 kHz 156.25 kHz 312.5 kHz
1 1 0 fPRS/2
7
15.63 kHz 39.06 kHz 78.13 kHz 156.25 kHz
Master
mode
1 1 1 External clock input from SCK11
Note
Slave
mode
Note Do not start communication with the external clock from the SCK11 pin when in the STOP mode.
Cautions 1. Do not write to CSIC11 while CSIE11 = 1 (operation enabled).
2. To use P37/SO11 and P35/SCK11 as general-purpose ports, set CSIC11 in the default status (00H).
3. The phase type of the data clock is type 1 after reset.
Remark fPRS: Peripheral hardware clock frequency