Datasheet

78K0/Ix2 CHAPTER 15 SERIAL INTERFACE IICA
R01UH0010EJ0500 Rev.5.00 548
Feb 28, 2012
Figure 15-34. Example of Slave to Master Communication
(When 8-Clock and 9-Clock Wait Is Selected for Master, 9-Clock Wait Is Selected for Slave) (3/3)
(3) Stop condition
IICA
ACKD0
STD0
SPD0
WTIM0
H
H
L
L
L
ACKE0
MSTS0
STT0
SPT0
WREL0
INTIICA0
TRC0
IICA
ACKD0
STD0
SPD0
WTIM0
ACKE0
MSTS0
STT0
SPT0
WREL0
INTIICA0
TRC0
SCLA0
SDAA0
12345678 9 1
D7 D6 D5 D4 D3 D2 D1 D0 AD6
NACK
Processing by master device
Transfer lines
Processing by slave device
IICA address
IICA FFH Note 1
IICA FFH Note 1
Note 1
Note 3
Notes 1, 3
IICA data Note 2
Stop
condition
Start
condition
(When SPIE0 = 1)
(When SPIE0 = 1)
Receive
ReceiveTransmit
Notes 1. To cancel wait, write “FFH” to IICA or set WREL0.
2. Write data to IICA, not setting WREL0, in order to cancel a wait state during slave transmission.
3. If a wait state during slave transmission is canceled by setting WREL0, TRC0 will be cleared.