Datasheet
78K0/Ix2 CHAPTER 15 SERIAL INTERFACE IICA
R01UH0010EJ0500 Rev.5.00 546
Feb 28, 2012
Figure 15-34. Example of Slave to Master Communication
(When 8-Clock Wait Is Selected for Master, 9-Clock Wait Is Selected for Slave) (1/3)
(1) Start condition ~ address
IICA
ACKD0
STD0
SPD0
WTIM0
H
H
L
L
L
H
L
ACKE0
MSTS0
STT0
L
L
SPT0
WREL0
INTIICA0
TRC0
IICA
ACKD0
STD0
SPD0
WTIM0
ACKE0
MSTS0
STT0
SPT0
WREL0
INTIICA0
TRC0
SCLA0
SDAA0
123456789 456321
AD6 AD5 AD4 AD3 AD2 AD1 AD0 D4 D3 D2D5D6D7
ACK
R
Processing by master device
Transfer lines
Processing by slave device
IICA ← address IICA ← FFH Note 1
Note 1
IICA ← data Note 2
Transmit
Transmit
Receive
Receive
Notes 1. To cancel master wait, write “FFH” to IICA or set WREL0.
2. Write data to IICA, not setting WREL0, in order to cancel a wait state during slave transmission.