Datasheet

78K0/Ix2 CHAPTER 15 SERIAL INTERFACE IICA
R01UH0010EJ0500 Rev.5.00 523
Feb 28, 2012
(b) Start ~ Address ~ Data ~ Start ~ Address ~ Data ~ Stop (restart)
(i) When WTIM0 = 0
ST AD6 to AD0 R/W ACK D7 to D0 AD6 to AD0ACK ACK SPST R/W D7 to D0 ACK
STT0 = 1
↓
SPT0 = 1
↓
3 4 7 2 1
5
6
1: IICAS0 = 1000×110B
2: IICAS0 = 1000×000B (Sets WTIM0 to 1)
Note 1
3: IICAS0 = 1000××00B (Clears WTIM0 to 0
Note 2
, sets STT0 to 1)
4: IICAS0 = 1000×110B
5: IICAS0 = 1000×000B (Sets WTIM0 to 1)
Note 3
6: IICAS0 = 1000××00B (Sets SPT0 to 1)
7: IICAS0 = 00000001B
Notes 1. To generate a start condition, set WTIM0 to 1 and change the timing for generating the INTIICA0
interrupt request signal.
2. Clear WTIM0 to 0 to restore the original setting.
3. To generate a stop condition, set WTIM0 to 1 and change the timing for generating the INTIICA0
interrupt request signal.
Remark : Always generated
: Generated only when SPIE0 = 1
×: Don’t care
(ii) When WTIM0 = 1
ST AD6 to AD0 R/W ACK D7 to D0 AD6 to AD0ACK ACK SPST R/W D7 to D0 ACK
STT0 = 1
↓
SPT0 = 1
↓
3 4 5 2 1
1: IICAS0 = 1000×110B
2: IICAS0 = 1000××00B (Sets STT0 to 1)
3: IICAS0 = 1000×110B
4: IICAS0 = 1000××00B (Sets SPT0 to 1)
5: IICAS0 = 00000001B
Remark
: Always generated
: Generated only when SPIE0 = 1
×: Don’t care