Datasheet

78K0/Ix2 CHAPTER 15 SERIAL INTERFACE IICA
R01UH0010EJ0500 Rev.5.00 487
Feb 28, 2012
Figure 15-7. Format of IICA Flag Register 0 (IICAF0)
<7>
STCF
Condition for clearing (STCF = 0)
Cleared by STT0 = 1
When IICE0 = 0 (operation stop)
Reset
Condition for setting (STCF = 1)
Generating start condition unsuccessful and the
STT0 bit cleared to 0 when communication
reservation is disabled (IICRSV = 1).
STCF
0
1
Generate start condition
Start condition generation unsuccessful: clear STT0 flag
STT0 clear flag
IICAF0
Symbol
<6>
IICBSY
5
0
4
0
3
0
2
0
<1>
STCEN
<0>
IICRSV
Address: FFA9H After reset: 00H R/W
Note
Condition for clearing (IICBSY = 0)
Detection of stop condition
When IICE0 = 0 (operation stop)
Reset
Condition for setting (IICBSY = 1)
Detection of start condition
Setting of the IICE0 bit when STCEN = 0
IICBSY
0
1
Bus release status (communication initial status when STCEN = 1)
Bus communication status (communication initial status when STCEN = 0)
I
2
C bus status flag
Condition for clearing (STCEN = 0)
Cleared by instruction
Detection of start condition
Reset
Condition for setting (STCEN = 1)
Set by instruction
STCEN
0
1
After operation is enabled (IICE0 = 1), enable generation of a start condition upon detection of
a stop condition.
After operation is enabled (IICE0 = 1), enable generation of a start condition without detecting
a stop condition.
Initial start enable trigger
Condition for clearing (IICRSV = 0)
Cleared by instruction
Reset
Condition for setting (IICRSV = 1)
Set by instruction
IICRSV
0
1
Enable communication reservation
Disable communication reservation
Communication reservation function disable bit
Note Bits 6 and 7 are read-only.
Cautions 1. Write to the STCEN bit only when the operation is stopped (IICE0 = 0).
2. As the bus release status (IICBSY = 0) is recognized regardless of the actual bus status
when STCEN = 1, when generating the first start condition (STT0 = 1), it is necessary to
verify that no third party communications are in progress in order to prevent such
communications from being destroyed.
3. Write to the IICRSV bit only when the operation is stopped (IICE0 = 0).
Remark STT0: Bit 1 of IICA control register 0 (IICACTL0)
IICE0: Bit 7 of IICA control register 0 (IICACTL0)