Datasheet

78K0/Ix2 CHAPTER 15 SERIAL INTERFACE IICA

R01UH0010EJ0500 Rev.5.00 474

Feb 28, 2012

CHAPTER 15 SERIAL INTERFACE IICA

78K0/IY2 78K0/IA2 78K0/IB2 Item

16 pins 20 pins 30 pins 32 pins

Serial interface IICA

 

Remark : Mounted, : Not mounted

15.1 Functions of Serial Interface IICA

Serial interface IICA has the following three modes.

(1) Operation stop mode

This mode is used when serial transfers are not performed. It can therefore be used to reduce power consumption.

(2) I

C bus mode (multimaster supported)

This mode is used for 8-bit data transfers with several devices via two lines: a serial clock (SCLA0) line and a

serial data bus (SDAA0) line.

This mode complies with the I

C bus format and the master device can generated “start condition”, “address”,

“transfer direction specification”, “data”, and “stop condition” data to the slave device, via the serial data bus. The

slave device automatically detects these received status and data by hardware. This function can simplify the part

of application program that controls the I

C bus.

Since the SCLA0 and SDAA0 pins are used for open drain outputs, serial interface IICA requires pull-up resistors

for the serial clock line and the serial data bus line.

(3) Wakeup mode

The STOP mode can be released by generating an interrupt request signal (INTIICA0) when an extension code

from the master device or a local address has been received while in STOP mode. This can be set by using the

WUP bit of the IICA control register 1 (IICACTL1).

Figure 15-1 shows a block diagram of serial interface IICA.