Datasheet

78K0/Ix2 CHAPTER 14 SERIAL INTERFACE UART6/DALI
R01UH0010EJ0500 Rev.5.00 467
Feb 28, 2012
14.4.4 Dedicated baud rate generator
The dedicated baud rate generator consists of a source clock selector and an 8-bit programmable counter, and
generates a serial clock for transmission/reception of UART6/DALI.
Separate 8-bit counters are provided for transmission and reception.
(1) Configuration of baud rate generator
 Base clock
The clock selected by bits 3 to 0 (TPS63 to TPS60) of clock selection register 6 (CKSR6) is supplied to each
module when bit 7 (POWER6) of UART/DALI operation mode register 6 (ASIM6) is 1. This clock is called the
base clock and its frequency is called f
XCLK6. The base clock is fixed to low level when POWER6 = 0.
 Transmission counter
This counter stops operation, cleared to 0, when bit 7 (POWER6) or bit 6 (TXE6) of UART/DALI operation mode
register 6 (ASIM6) is 0.
It starts counting when POWER6 = 1 and TXE6 = 1.
The counter is cleared to 0 when the first data transmitted is written to UART/DALI transmit buffer register 6
(TXB6).
If data are continuously transmitted, the counter is cleared to 0 again when one frame of data has been completely
transmitted. If there is no data to be transmitted next, the counter is not cleared to 0 and continues counting until
POWER6 or TXE6 is cleared to 0.
 Reception counter
This counter stops operation, cleared to 0, when bit 7 (POWER6) or bit 5 (RXE6) of UART/DALI operation mode
register 6 (ASIM6) is 0.
It starts counting when the start bit has been detected.
The counter stops operation after one frame has been received, until the next start bit is detected.