Datasheet

78K0/Ix2 CHAPTER 2 PIN FUNCTIONS
R01UH0010EJ0500 Rev.5.00 35
Feb 28, 2012
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins
Tables 2-2 to 2-5 show the types of pin I/O circuits and the recommended connections of unused pins.
See Figure 2-1 for the configuration of the I/O circuit of each type.
Table 2-2. Pin I/O Circuit Types (78K0/IY2)
Pin Name I/O Circuit Type I/O Recommended Connection of Unused Pins
ANI0/P20 11-G
ANI1/P21/PGAIN
Note 1
11-O
ANI3/P23/CMP2+
ANI4/P24/CMP0+
ANI5/P25/CMP1+
11-Q
<Digital input setting>
Independently connect to AV
REF or VSS via a resistor.
<Analog input setting and digital output setting>
Leave open
Note 3
.
P31/TOX00/INTP2/TOOLC1
P32/TOX01/INTP3/TOOLD1
P33/TOX10
P34/TOX11/INTP4/TOH1/
TI51
5-AQ
I/O
Input: Independently connect to V
DD or VSS via a resistor.
Output: Leave open.
P121/X1/TOOLC0
Note 2
/
TI000/INTP0
P122/X2/EXCLK/TOOLD0
Note 2
37-A
Independently connect to V
DD or VSS via a resistor.
RESET/P125/TI000/INTP0
42-A
Input
Connect directly to V
DD or via a resistor.
AVREF

Connect directly to V
DD.
Notes 1.
PD78F0750, 78F0751, 78F0752 (products with operational amplifier) only
2. Use recommended connection above in input port mode (refer to Figure 5-2 Format of Clock Operation
Mode Select Register (OSCCTL)) when these pins are not used.
3. If this pin is left open when specified as an analog input pin, the input voltage level might become undefined. It
is therefore recommended to leave this pin open after specifying it as a digital output pin.
Cautions 1. ANI0/P20, ANI1/P21/PGAIN, ANI3/P23/CMP2+, ANI4/P24/CMP0+ and ANI5/P25/CMP1+ are set in the
analog input mode after release of reset.
2. Pin function of RESET/P125/
TI000/INTP0 is set in the external reset input after release of reset.
Remark Functions in angle brackets < > can be assigned by setting the input switch control register (MUXSEL).